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-rw-r--r--src/cpu/ozone/SimpleOzoneCPU.py3
-rw-r--r--src/cpu/ozone/back_end_impl.hh9
-rw-r--r--src/cpu/ozone/checker_builder.cc3
-rw-r--r--src/cpu/ozone/cpu.hh40
-rw-r--r--src/cpu/ozone/cpu_builder.cc29
-rw-r--r--src/cpu/ozone/cpu_impl.hh136
-rw-r--r--src/cpu/ozone/dyn_inst.hh4
-rw-r--r--src/cpu/ozone/dyn_inst_impl.hh11
-rw-r--r--src/cpu/ozone/front_end_impl.hh6
-rw-r--r--src/cpu/ozone/inorder_back_end.hh2
-rw-r--r--src/cpu/ozone/inorder_back_end_impl.hh51
-rw-r--r--src/cpu/ozone/lsq_unit.hh1
-rw-r--r--src/cpu/ozone/lw_back_end_impl.hh53
-rw-r--r--src/cpu/ozone/lw_lsq.hh1
-rw-r--r--src/cpu/ozone/simple_cpu_builder.cc28
-rw-r--r--src/cpu/ozone/simple_params.hh2
-rw-r--r--src/cpu/ozone/thread_state.hh13
17 files changed, 127 insertions, 265 deletions
diff --git a/src/cpu/ozone/SimpleOzoneCPU.py b/src/cpu/ozone/SimpleOzoneCPU.py
index d4620cd8e..d79418b27 100644
--- a/src/cpu/ozone/SimpleOzoneCPU.py
+++ b/src/cpu/ozone/SimpleOzoneCPU.py
@@ -35,8 +35,7 @@ class SimpleOzoneCPU(BaseCPU):
numThreads = Param.Unsigned("number of HW thread contexts")
- if not buildEnv['FULL_SYSTEM']:
- mem = Param.FunctionalMemory(NULL, "memory")
+ mem = Param.FunctionalMemory(NULL, "memory")
width = Param.Unsigned("Width")
frontEndWidth = Param.Unsigned("Front end width")
diff --git a/src/cpu/ozone/back_end_impl.hh b/src/cpu/ozone/back_end_impl.hh
index 169f328ad..1df0cdf0e 100644
--- a/src/cpu/ozone/back_end_impl.hh
+++ b/src/cpu/ozone/back_end_impl.hh
@@ -1456,7 +1456,6 @@ BackEnd<Impl>::commitInst(int inst_num)
// thread->funcExeInst--;
if (inst->isNonSpeculative()) {
-#if !FULL_SYSTEM
// Hack to make sure syscalls aren't executed until all stores
// write back their data. This direct communication shouldn't
// be used for anything other than this.
@@ -1464,7 +1463,6 @@ BackEnd<Impl>::commitInst(int inst_num)
DPRINTF(BE, "Waiting for all stores to writeback.\n");
return false;
}
-#endif
DPRINTF(BE, "Encountered a store or non-speculative "
"instruction at the head of the ROB, PC %#x.\n",
@@ -1512,7 +1510,6 @@ BackEnd<Impl>::commitInst(int inst_num)
if (inst_fault != NoFault) {
if (!inst->isNop()) {
-#if FULL_SYSTEM
DPRINTF(BE, "Inst [sn:%lli] PC %#x has a fault\n",
inst->seqNum, inst->readPC());
@@ -1533,10 +1530,6 @@ BackEnd<Impl>::commitInst(int inst_num)
// generateTrapEvent();
return false;
-#else // !FULL_SYSTEM
- panic("fault (%d) detected @ PC %08p", inst_fault,
- inst->PC);
-#endif // FULL_SYSTEM
}
}
@@ -1574,7 +1567,6 @@ BackEnd<Impl>::commitInst(int inst_num)
// Write the done sequence number here.
toIEW->doneSeqNum = inst->seqNum;
-#if FULL_SYSTEM
int count = 0;
Addr oldpc;
do {
@@ -1591,7 +1583,6 @@ BackEnd<Impl>::commitInst(int inst_num)
// squashPending = true;
return false;
}
-#endif
return true;
}
diff --git a/src/cpu/ozone/checker_builder.cc b/src/cpu/ozone/checker_builder.cc
index 6baa95658..f4bb03dcc 100644
--- a/src/cpu/ozone/checker_builder.cc
+++ b/src/cpu/ozone/checker_builder.cc
@@ -91,11 +91,8 @@ OzoneCheckerParams::create()
params->dtb = dtb;
params->system = system;
params->cpu_id = cpu_id;
-#if FULL_SYSTEM
params->profile = profile;
-#else
params->process = workload;
-#endif
OzoneChecker *cpu = new OzoneChecker(params);
return cpu;
diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh
index 541fea44c..ff43ad6cb 100644
--- a/src/cpu/ozone/cpu.hh
+++ b/src/cpu/ozone/cpu.hh
@@ -33,8 +33,8 @@
#include <set>
+#include "arch/alpha/tlb.hh"
#include "base/statistics.hh"
-#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "cpu/ozone/rename_table.hh"
#include "cpu/ozone/thread_state.hh"
@@ -48,31 +48,20 @@
#include "sim/eventq.hh"
// forward declarations
-#if FULL_SYSTEM
-#include "arch/alpha/tlb.hh"
-
-namespace TheISA
-{
- class TLB;
-}
-class PhysicalMemory;
-class MemoryController;
namespace TheISA {
namespace Kernel {
class Statistics;
};
+ class TLB;
};
-#else
-
-class Process;
-
-#endif // FULL_SYSTEM
-
class Checkpoint;
class EndQuiesceEvent;
+class MemoryController;
class MemObject;
+class PhysicalMemory;
+class Process;
class Request;
namespace Trace {
@@ -116,7 +105,6 @@ class OzoneCPU : public BaseCPU
TheISA::TLB * getDTBPtr() { return cpu->dtb; }
-#if FULL_SYSTEM
System *getSystemPtr() { return cpu->system; }
PhysicalMemory *getPhysMemPtr() { return cpu->physmem; }
@@ -124,15 +112,14 @@ class OzoneCPU : public BaseCPU
TheISA::Kernel::Statistics *getKernelStats()
{ return thread->getKernelStats(); }
+ Process *getProcessPtr() { return thread->getProcessPtr(); }
+
PortProxy* getPhysProxy() { return thread->getPhysProxy(); }
FSTranslatingPortProxy* getVirtProxy()
{ return thread->getVirtProxy(); }
-#else
- SETranslatingPortProxy* getMemProxy() { return thread->getMemProxy(); }
- Process *getProcessPtr() { return thread->getProcessPtr(); }
-#endif
+ SETranslatingPortProxy* getMemProxy() { return thread->getMemProxy(); }
Status status() const { return thread->status(); }
@@ -148,9 +135,7 @@ class OzoneCPU : public BaseCPU
/// Set the status to Halted.
void halt();
-#if FULL_SYSTEM
void dumpFuncProfile();
-#endif
void takeOverFrom(ThreadContext *old_context);
@@ -159,7 +144,6 @@ class OzoneCPU : public BaseCPU
void serialize(std::ostream &os);
void unserialize(Checkpoint *cp, const std::string &section);
-#if FULL_SYSTEM
EndQuiesceEvent *getQuiesceEvent();
Tick readLastActivate();
@@ -167,7 +151,6 @@ class OzoneCPU : public BaseCPU
void profileClear();
void profileSample();
-#endif
int threadId();
@@ -227,12 +210,10 @@ class OzoneCPU : public BaseCPU
bool misspeculating() { return false; }
-#if !FULL_SYSTEM
Counter readFuncExeInst() { return thread->funcExeInst; }
void setFuncExeInst(Counter new_val)
{ thread->funcExeInst = new_val; }
-#endif
};
// Ozone specific thread context
@@ -326,7 +307,6 @@ class OzoneCPU : public BaseCPU
int switchCount;
-#if FULL_SYSTEM
Addr dbg_vtophys(Addr addr);
bool interval_stats;
@@ -335,7 +315,6 @@ class OzoneCPU : public BaseCPU
TheISA::TLB *dtb;
System *system;
PhysicalMemory *physmem;
-#endif
virtual Port *getPort(const std::string &name, int idx);
@@ -414,13 +393,10 @@ class OzoneCPU : public BaseCPU
void dumpInsts() { frontEnd->dumpInsts(); }
-#if FULL_SYSTEM
Fault hwrei();
bool simPalCheck(int palFunc);
void processInterrupts();
-#else
void syscall(uint64_t &callnum);
-#endif
ThreadContext *tcBase() { return tc; }
diff --git a/src/cpu/ozone/cpu_builder.cc b/src/cpu/ozone/cpu_builder.cc
index 63b7eb6ff..65f68152f 100644
--- a/src/cpu/ozone/cpu_builder.cc
+++ b/src/cpu/ozone/cpu_builder.cc
@@ -57,21 +57,20 @@ DerivOzoneCPUParams::create()
{
DerivOzoneCPU *cpu;
-#if FULL_SYSTEM
- // Full-system only supports a single thread for the moment.
- ThreadID actual_num_threads = 1;
-#else
- // In non-full-system mode, we infer the number of threads from
- // the workload if it's not explicitly specified.
- ThreadID actual_num_threads =
- numThreads.isValid() ? numThreads : workload.size();
-
- if (workload.size() == 0) {
- fatal("Must specify at least one workload!");
+ if (FullSystem) {
+ // Full-system only supports a single thread for the moment.
+ ThreadID actual_num_threads = 1;
+ } else {
+ // In non-full-system mode, we infer the number of threads from
+ // the workload if it's not explicitly specified.
+ ThreadID actual_num_threads =
+ numThreads.isValid() ? numThreads : workload.size();
+
+ if (workload.size() == 0) {
+ fatal("Must specify at least one workload!");
+ }
}
-#endif
-
SimpleParams *params = new SimpleParams;
params->clock = clock;
@@ -84,15 +83,11 @@ DerivOzoneCPUParams::create()
params->system = system;
params->cpu_id = cpu_id;
-#if FULL_SYSTEM
params->profile = profile;
params->do_quiesce = do_quiesce;
params->do_checkpoint_insts = do_checkpoint_insts;
params->do_statistics_insts = do_statistics_insts;
-#else
params->workload = workload;
-// params->pTable = page_table;
-#endif // FULL_SYSTEM
params->checker = checker;
params->max_insts_any_thread = max_insts_any_thread;
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index 273d46bdc..f532078fe 100644
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -29,37 +29,33 @@
* Nathan Binkert
*/
+#include "arch/alpha/osfpal.hh"
+#include "arch/faults.hh"
#include "arch/isa_traits.hh" // For MachInst
+#include "arch/kernel_stats.hh"
+#include "arch/tlb.hh"
+#include "arch/types.hh"
+#include "arch/vtophys.hh"
+#include "base/callback.hh"
#include "base/trace.hh"
-#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "config/use_checker.hh"
#include "cpu/ozone/cpu.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
+#include "cpu/profile.hh"
#include "cpu/quiesce_event.hh"
#include "cpu/simple_thread.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
-#include "sim/sim_object.hh"
-#include "sim/stats.hh"
-
-#if FULL_SYSTEM
-#include "arch/alpha/osfpal.hh"
-#include "arch/faults.hh"
-#include "arch/kernel_stats.hh"
-#include "arch/tlb.hh"
-#include "arch/types.hh"
-#include "arch/vtophys.hh"
-#include "base/callback.hh"
-#include "cpu/profile.hh"
#include "sim/faults.hh"
+#include "sim/full_system.hh"
+#include "sim/process.hh"
#include "sim/sim_events.hh"
#include "sim/sim_exit.hh"
+#include "sim/sim_object.hh"
+#include "sim/stats.hh"
#include "sim/system.hh"
-#else // !FULL_SYSTEM
-#include "sim/process.hh"
-#endif // FULL_SYSTEM
#if USE_CHECKER
#include "cpu/checker/thread_context.hh"
@@ -89,12 +85,8 @@ OzoneCPU<Impl>::TickEvent::description() const
template <class Impl>
OzoneCPU<Impl>::OzoneCPU(Params *p)
-#if FULL_SYSTEM
- : BaseCPU(p), thread(this, 0), tickEvent(this, p->width),
-#else
- : BaseCPU(p), thread(this, 0, p->workload[0], 0),
- tickEvent(this, p->width),
-#endif
+ : BaseCPU(p), thread(this, 0, p->workload[0], 0), tickEvent(this,
+ p->width),
#ifndef NDEBUG
instcount(0),
#endif
@@ -109,9 +101,7 @@ OzoneCPU<Impl>::OzoneCPU(Params *p)
#if USE_CHECKER
BaseCPU *temp_checker = p->checker;
checker = dynamic_cast<Checker<DynInstPtr> *>(temp_checker);
-#if FULL_SYSTEM
checker->setSystem(p->system);
-#endif
checkerTC = new CheckerThreadContext<OzoneTC>(&ozoneTC, checker);
thread.tc = checkerTC;
tc = checkerTC;
@@ -133,33 +123,35 @@ OzoneCPU<Impl>::OzoneCPU(Params *p)
itb = p->itb;
dtb = p->dtb;
-#if FULL_SYSTEM
- // Setup thread state stuff.
- thread.cpu = this;
- thread.setTid(0);
-
- thread.quiesceEvent = new EndQuiesceEvent(tc);
-
- system = p->system;
- physmem = p->system->physmem;
-
- if (p->profile) {
- thread.profile = new FunctionProfile(p->system->kernelSymtab);
- // @todo: This might be better as an ThreadContext instead of OzoneTC
- Callback *cb =
- new MakeCallback<OzoneTC,
- &OzoneTC::dumpFuncProfile>(&ozoneTC);
- registerExitCallback(cb);
- }
- // let's fill with a dummy node for now so we don't get a segfault
- // on the first cycle when there's no node available.
- static ProfileNode dummyNode;
- thread.profileNode = &dummyNode;
- thread.profilePC = 3;
-#else
- thread.cpu = this;
-#endif // !FULL_SYSTEM
+ if (FullSystem) {
+ // Setup thread state stuff.
+ thread.cpu = this;
+ thread.setTid(0);
+
+ thread.quiesceEvent = new EndQuiesceEvent(tc);
+
+ system = p->system;
+ physmem = p->system->physmem;
+
+ if (p->profile) {
+ thread.profile = new FunctionProfile(p->system->kernelSymtab);
+ // @todo: This might be better as an ThreadContext instead of
+ // OzoneTC
+ Callback *cb =
+ new MakeCallback<OzoneTC,
+ &OzoneTC::dumpFuncProfile>(&ozoneTC);
+ registerExitCallback(cb);
+ }
+
+ // let's fill with a dummy node for now so we don't get a segfault
+ // on the first cycle when there's no node available.
+ static ProfileNode dummyNode;
+ thread.profileNode = &dummyNode;
+ thread.profilePC = 3;
+ } else {
+ thread.cpu = this;
+ }
numInst = 0;
startNumInst = 0;
@@ -194,9 +186,7 @@ OzoneCPU<Impl>::OzoneCPU(Params *p)
frontEnd->renameTable.copyFrom(thread.renameTable);
backEnd->renameTable.copyFrom(thread.renameTable);
-#if FULL_SYSTEM
thread.connectMemPorts(tc);
-#endif
DPRINTF(OzoneCPU, "OzoneCPU: Created Ozone cpu object.\n");
}
@@ -305,10 +295,8 @@ OzoneCPU<Impl>::activateContext(int thread_num, int delay)
notIdleFraction++;
scheduleTickEvent(delay);
_status = Running;
-#if FULL_SYSTEM
if (thread.quiesceEvent && thread.quiesceEvent->scheduled())
thread.quiesceEvent->deschedule();
-#endif
thread.setStatus(ThreadContext::Active);
frontEnd->wakeFromQuiesce();
}
@@ -398,14 +386,14 @@ OzoneCPU<Impl>::init()
// Mark this as in syscall so it won't need to squash
thread.inSyscall = true;
-#if FULL_SYSTEM
- for (int i = 0; i < threadContexts.size(); ++i) {
- ThreadContext *tc = threadContexts[i];
+ if (FullSystem) {
+ for (int i = 0; i < threadContexts.size(); ++i) {
+ ThreadContext *tc = threadContexts[i];
- // initialize CPU, including PC
- TheISA::initCPU(tc, tc->contextId());
+ // initialize CPU, including PC
+ TheISA::initCPU(tc, tc->contextId());
+ }
}
-#endif
frontEnd->renameTable.copyFrom(thread.renameTable);
backEnd->renameTable.copyFrom(thread.renameTable);
@@ -464,29 +452,24 @@ OzoneCPU<Impl>::unserialize(Checkpoint *cp, const std::string &section)
thread.getTC()->copyArchRegs(temp.getTC());
}
-#if FULL_SYSTEM
template <class Impl>
Addr
OzoneCPU<Impl>::dbg_vtophys(Addr addr)
{
return vtophys(tc, addr);
}
-#endif // FULL_SYSTEM
-#if FULL_SYSTEM
template <class Impl>
void
OzoneCPU<Impl>::wakeup()
{
if (_status == Idle) {
DPRINTF(IPI,"Suspended Processor awoke\n");
-// thread.activate();
// Hack for now. Otherwise might have to go through the tc, or
// I need to figure out what's the right thing to call.
activateContext(thread.threadId(), 1);
}
}
-#endif // FULL_SYSTEM
/* start simulation, program loaded, processor precise state initialized */
template <class Impl>
@@ -519,7 +502,6 @@ OzoneCPU<Impl>::squashFromTC()
backEnd->generateTCEvent();
}
-#if !FULL_SYSTEM
template <class Impl>
void
OzoneCPU<Impl>::syscall(uint64_t &callnum)
@@ -542,7 +524,7 @@ OzoneCPU<Impl>::syscall(uint64_t &callnum)
frontEnd->renameTable.copyFrom(thread.renameTable);
backEnd->renameTable.copyFrom(thread.renameTable);
}
-#else
+
template <class Impl>
Fault
OzoneCPU<Impl>::hwrei()
@@ -600,7 +582,6 @@ OzoneCPU<Impl>::simPalCheck(int palFunc)
return true;
}
-#endif
template <class Impl>
BaseCPU *
@@ -639,25 +620,20 @@ OzoneCPU<Impl>::OzoneTC::halt()
cpu->haltContext(thread->threadId());
}
-#if FULL_SYSTEM
template <class Impl>
void
OzoneCPU<Impl>::OzoneTC::dumpFuncProfile()
{
thread->dumpFuncProfile();
}
-#endif
template <class Impl>
void
OzoneCPU<Impl>::OzoneTC::takeOverFrom(ThreadContext *old_context)
{
// some things should already be set up
-#if FULL_SYSTEM
assert(getSystemPtr() == old_context->getSystemPtr());
-#else
assert(getProcessPtr() == old_context->getProcessPtr());
-#endif
// copy over functional state
setStatus(old_context->status());
@@ -665,9 +641,7 @@ OzoneCPU<Impl>::OzoneTC::takeOverFrom(ThreadContext *old_context)
setCpuId(old_context->cpuId());
setContextId(old_context->contextId());
-#if !FULL_SYSTEM
setFuncExeInst(old_context->readFuncExeInst());
-#else
EndQuiesceEvent *other_quiesce = old_context->getQuiesceEvent();
if (other_quiesce) {
// Point the quiesce event's TC at this TC so that it wakes up
@@ -691,10 +665,10 @@ template <class Impl>
void
OzoneCPU<Impl>::OzoneTC::regStats(const std::string &name)
{
-#if FULL_SYSTEM
- thread->kernelStats = new TheISA::Kernel::Statistics(cpu->system);
- thread->kernelStats->regStats(name + ".kern");
-#endif
+ if (FullSystem) {
+ thread->kernelStats = new TheISA::Kernel::Statistics(cpu->system);
+ thread->kernelStats->regStats(name + ".kern");
+ }
}
template <class Impl>
@@ -711,7 +685,6 @@ void
OzoneCPU<Impl>::OzoneTC::unserialize(Checkpoint *cp, const std::string &section)
{ }
-#if FULL_SYSTEM
template <class Impl>
EndQuiesceEvent *
OzoneCPU<Impl>::OzoneTC::getQuiesceEvent()
@@ -746,7 +719,6 @@ OzoneCPU<Impl>::OzoneTC::profileSample()
{
thread->profileSample();
}
-#endif
template <class Impl>
int
@@ -781,9 +753,7 @@ OzoneCPU<Impl>::OzoneTC::copyArchRegs(ThreadContext *tc)
thread->renameTable[fp_idx]->setIntResult(tc->readFloatRegBits(i));
}
-#if !FULL_SYSTEM
thread->funcExeInst = tc->readFuncExeInst();
-#endif
// Need to copy the TC values into the current rename table,
// copy the misc regs.
diff --git a/src/cpu/ozone/dyn_inst.hh b/src/cpu/ozone/dyn_inst.hh
index c1853b1ed..b5c0bee7c 100644
--- a/src/cpu/ozone/dyn_inst.hh
+++ b/src/cpu/ozone/dyn_inst.hh
@@ -36,7 +36,6 @@
#include "arch/isa_traits.hh"
#include "arch/types.hh"
-#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "cpu/ozone/cpu.hh" // MUST include this
#include "cpu/ozone/ozone_impl.hh"
@@ -214,13 +213,10 @@ class OzoneDynInst : public BaseDynInst<Impl>
void setMiscReg(int misc_reg, const MiscReg &val);
-#if FULL_SYSTEM
Fault hwrei();
void trap(Fault fault);
bool simPalCheck(int palFunc);
-#else
void syscall(uint64_t &callnum);
-#endif
ListIt iqIt;
bool iqItValid;
diff --git a/src/cpu/ozone/dyn_inst_impl.hh b/src/cpu/ozone/dyn_inst_impl.hh
index 5eb8ea8da..96d326ffc 100644
--- a/src/cpu/ozone/dyn_inst_impl.hh
+++ b/src/cpu/ozone/dyn_inst_impl.hh
@@ -28,14 +28,10 @@
* Authors: Kevin Lim
*/
-#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "cpu/ozone/dyn_inst.hh"
-#include "sim/faults.hh"
-
-#if FULL_SYSTEM
#include "kern/kernel_stats.hh"
-#endif
+#include "sim/faults.hh"
template <class Impl>
OzoneDynInst<Impl>::OzoneDynInst(OzoneCPU *cpu)
@@ -239,8 +235,6 @@ OzoneDynInst<Impl>::setMiscReg(int misc_reg, const MiscReg &val)
this->thread->setMiscReg(misc_reg, val);
}
-#if FULL_SYSTEM
-
template <class Impl>
Fault
OzoneDynInst<Impl>::hwrei()
@@ -269,11 +263,10 @@ OzoneDynInst<Impl>::simPalCheck(int palFunc)
{
return this->cpu->simPalCheck(palFunc);
}
-#else
+
template <class Impl>
void
OzoneDynInst<Impl>::syscall(uint64_t &callnum)
{
this->cpu->syscall(callnum);
}
-#endif
diff --git a/src/cpu/ozone/front_end_impl.hh b/src/cpu/ozone/front_end_impl.hh
index a11cf74bd..e7255d75f 100644
--- a/src/cpu/ozone/front_end_impl.hh
+++ b/src/cpu/ozone/front_end_impl.hh
@@ -426,13 +426,10 @@ FrontEnd<Impl>::tick()
numInstsReady[0]++;
++num_inst;
-#if FULL_SYSTEM
if (inst->isQuiesce()) {
-// warn("%lli: Quiesce instruction encountered, halting fetch!", curTick());
status = QuiescePending;
break;
}
-#endif
if (inst->predTaken()) {
// Start over with tick?
@@ -980,9 +977,6 @@ FrontEnd<Impl>::takeOverFrom(ThreadContext *old_tc)
cacheBlkValid = false;
-#if !FULL_SYSTEM
-// pTable = params->pTable;
-#endif
fetchFault = NoFault;
serializeNext = false;
barrierInst = NULL;
diff --git a/src/cpu/ozone/inorder_back_end.hh b/src/cpu/ozone/inorder_back_end.hh
index 5c2f9c28f..820e7d33b 100644
--- a/src/cpu/ozone/inorder_back_end.hh
+++ b/src/cpu/ozone/inorder_back_end.hh
@@ -73,9 +73,7 @@ class InorderBackEnd
void regStats() { }
-#if FULL_SYSTEM
void checkInterrupts();
-#endif
void tick();
void executeInsts();
diff --git a/src/cpu/ozone/inorder_back_end_impl.hh b/src/cpu/ozone/inorder_back_end_impl.hh
index 13c066fd2..59d1dab0d 100644
--- a/src/cpu/ozone/inorder_back_end_impl.hh
+++ b/src/cpu/ozone/inorder_back_end_impl.hh
@@ -79,7 +79,6 @@ InorderBackEnd<Impl>::setThreadState(OzoneThreadState<Impl> *thread_ptr)
thread->setFuncExeInst(0);
}
-#if FULL_SYSTEM
template <class Impl>
void
InorderBackEnd<Impl>::checkInterrupts()
@@ -134,7 +133,6 @@ InorderBackEnd<Impl>::checkInterrupts()
setSquashInfoFromXC();
}
}
-#endif
template <class Impl>
void
@@ -149,8 +147,7 @@ InorderBackEnd<Impl>::tick()
// if (interrupt) then set thread PC, stall front end, record that
// I'm waiting for it to drain. (for now just squash)
-#if FULL_SYSTEM
- if (interruptBlocked || cpu->checkInterrupts(tc)) {
+ if (FullSystem && (interruptBlocked || cpu->checkInterrupts(tc))) {
if (!robEmpty()) {
interruptBlocked = true;
//AlphaDep
@@ -165,7 +162,6 @@ InorderBackEnd<Impl>::tick()
return;
}
}
-#endif
if (status != DcacheMissLoadStall &&
status != DcacheMissStoreStall) {
@@ -180,15 +176,11 @@ InorderBackEnd<Impl>::tick()
(*instsAdded)++;
}
-#if FULL_SYSTEM
if (faultFromFetch && robEmpty() && frontEnd->isEmpty()) {
handleFault();
} else {
executeInsts();
}
-#else
- executeInsts();
-#endif
}
}
@@ -209,24 +201,24 @@ InorderBackEnd<Impl>::executeInsts()
thread->setPC(commitPC);
thread->setNextPC(inst->readNextPC());
-#if FULL_SYSTEM
- int count = 0;
- Addr oldpc;
- do {
- if (count == 0)
- assert(!thread->inSyscall && !thread->trapPending);
- oldpc = thread->readPC();
- cpu->system->pcEventQueue.service(
- thread->getXCProxy());
- count++;
- } while (oldpc != thread->readPC());
- if (count > 1) {
- DPRINTF(IBE, "PC skip function event, stopping commit\n");
- completed_last_inst = false;
- squashPending = true;
- break;
+ if (FullSystem) {
+ int count = 0;
+ Addr oldpc;
+ do {
+ if (count == 0)
+ assert(!thread->inSyscall && !thread->trapPending);
+ oldpc = thread->readPC();
+ cpu->system->pcEventQueue.service(
+ thread->getXCProxy());
+ count++;
+ } while (oldpc != thread->readPC());
+ if (count > 1) {
+ DPRINTF(IBE, "PC skip function event, stopping commit\n");
+ completed_last_inst = false;
+ squashPending = true;
+ break;
+ }
}
-#endif
Fault inst_fault = NoFault;
@@ -296,7 +288,6 @@ InorderBackEnd<Impl>::executeInsts()
}
if (inst_fault != NoFault) {
-#if FULL_SYSTEM
DPRINTF(IBE, "Inst [sn:%lli] PC %#x has a fault\n",
inst->seqNum, inst->readPC());
@@ -313,14 +304,8 @@ InorderBackEnd<Impl>::executeInsts()
squashPending = true;
- // Generate trap squash event.
-// generateTrapEvent(tid);
completed_last_inst = false;
break;
-#else // !FULL_SYSTEM
- panic("fault (%d) detected @ PC %08p", inst_fault,
- inst->PC);
-#endif // FULL_SYSTEM
}
for (int i = 0; i < inst->numDestRegs(); ++i) {
diff --git a/src/cpu/ozone/lsq_unit.hh b/src/cpu/ozone/lsq_unit.hh
index 1d8328610..c812a10a2 100644
--- a/src/cpu/ozone/lsq_unit.hh
+++ b/src/cpu/ozone/lsq_unit.hh
@@ -38,7 +38,6 @@
#include "arch/faults.hh"
#include "arch/types.hh"
#include "base/hashmap.hh"
-#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "cpu/inst_seq.hh"
#include "mem/mem_interface.hh"
diff --git a/src/cpu/ozone/lw_back_end_impl.hh b/src/cpu/ozone/lw_back_end_impl.hh
index 880d0d183..c06a58754 100644
--- a/src/cpu/ozone/lw_back_end_impl.hh
+++ b/src/cpu/ozone/lw_back_end_impl.hh
@@ -520,7 +520,6 @@ LWBackEnd<Impl>::setCommBuffer(TimeBuffer<CommStruct> *_comm)
fromCommit = comm->getWire(-1);
}
-#if FULL_SYSTEM
template <class Impl>
void
LWBackEnd<Impl>::checkInterrupts()
@@ -557,7 +556,6 @@ LWBackEnd<Impl>::checkInterrupts()
}
}
}
-#endif
template <class Impl>
void
@@ -604,9 +602,7 @@ LWBackEnd<Impl>::tick()
wbCycle = 0;
-#if FULL_SYSTEM
checkInterrupts();
-#endif
if (trapSquash) {
assert(!tcSquash);
@@ -1049,16 +1045,8 @@ LWBackEnd<Impl>::commitInst(int inst_num)
(inst->isStoreConditional() && inst->getFault() == NoFault) ||
inst->isMemBarrier() ||
inst->isWriteBarrier()) {
-#if !FULL_SYSTEM
- // Hack to make sure syscalls aren't executed until all stores
- // write back their data. This direct communication shouldn't
- // be used for anything other than this.
- if (inst_num > 0 || LSQ.hasStoresToWB())
-#else
if ((inst->isMemBarrier() || inst->isWriteBarrier() ||
- inst->isQuiesce()) &&
- LSQ.hasStoresToWB())
-#endif
+ inst->isQuiesce()) && LSQ.hasStoresToWB())
{
DPRINTF(BE, "Waiting for all stores to writeback.\n");
return false;
@@ -1184,11 +1172,7 @@ LWBackEnd<Impl>::commitInst(int inst_num)
++freed_regs;
}
-#if FULL_SYSTEM
- if (thread->profile) {
-// bool usermode =
-// (xc->readMiscRegNoEffect(AlphaISA::IPR_DTB_CM) & 0x18) != 0;
-// thread->profilePC = usermode ? 1 : inst->readPC();
+ if (FullSystem && thread->profile) {
thread->profilePC = inst->readPC();
ProfileNode *node = thread->profile->consume(thread->getTC(),
inst->staticInst);
@@ -1196,7 +1180,6 @@ LWBackEnd<Impl>::commitInst(int inst_num)
if (node)
thread->profileNode = node;
}
-#endif
if (inst->traceData) {
inst->traceData->setFetchSeq(inst->seqNum);
@@ -1225,23 +1208,23 @@ LWBackEnd<Impl>::commitInst(int inst_num)
toIEW->doneSeqNum = inst->seqNum;
lastCommitCycle = curTick();
-#if FULL_SYSTEM
- int count = 0;
- Addr oldpc;
- do {
- if (count == 0)
- assert(!thread->inSyscall && !thread->trapPending);
- oldpc = thread->readPC();
- cpu->system->pcEventQueue.service(
- thread->getTC());
- count++;
- } while (oldpc != thread->readPC());
- if (count > 1) {
- DPRINTF(BE, "PC skip function event, stopping commit\n");
- tcSquash = true;
- return false;
+ if (FullSystem) {
+ int count = 0;
+ Addr oldpc;
+ do {
+ if (count == 0)
+ assert(!thread->inSyscall && !thread->trapPending);
+ oldpc = thread->readPC();
+ cpu->system->pcEventQueue.service(
+ thread->getTC());
+ count++;
+ } while (oldpc != thread->readPC());
+ if (count > 1) {
+ DPRINTF(BE, "PC skip function event, stopping commit\n");
+ tcSquash = true;
+ return false;
+ }
}
-#endif
return true;
}
diff --git a/src/cpu/ozone/lw_lsq.hh b/src/cpu/ozone/lw_lsq.hh
index 1add13894..dd573e5e0 100644
--- a/src/cpu/ozone/lw_lsq.hh
+++ b/src/cpu/ozone/lw_lsq.hh
@@ -40,7 +40,6 @@
#include "arch/types.hh"
#include "base/fast_alloc.hh"
#include "base/hashmap.hh"
-#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "cpu/inst_seq.hh"
#include "mem/packet.hh"
diff --git a/src/cpu/ozone/simple_cpu_builder.cc b/src/cpu/ozone/simple_cpu_builder.cc
index f4446ede3..512dc3b9e 100644
--- a/src/cpu/ozone/simple_cpu_builder.cc
+++ b/src/cpu/ozone/simple_cpu_builder.cc
@@ -60,21 +60,20 @@ SimpleOzoneCPUParams::create()
{
SimpleOzoneCPU *cpu;
-#if FULL_SYSTEM
- // Full-system only supports a single thread for the moment.
- ThreadID actual_num_threads = 1;
-#else
- // In non-full-system mode, we infer the number of threads from
- // the workload if it's not explicitly specified.
- ThreadID actual_num_threads =
- numThreads.isValid() ? numThreads : workload.size();
-
- if (workload.size() == 0) {
- fatal("Must specify at least one workload!");
+ if (FullSystem) {
+ // Full-system only supports a single thread for the moment.
+ ThreadID actual_num_threads = 1;
+ } else {
+ // In non-full-system mode, we infer the number of threads from
+ // the workload if it's not explicitly specified.
+ ThreadID actual_num_threads =
+ numThreads.isValid() ? numThreads : workload.size();
+
+ if (workload.size() == 0) {
+ fatal("Must specify at least one workload!");
+ }
}
-#endif
-
SimpleParams *params = new SimpleParams;
params->clock = clock;
@@ -87,10 +86,7 @@ SimpleOzoneCPUParams::create()
params->system = system;
params->cpu_id = cpu_id;
-#if !FULL_SYSTEM
params->workload = workload;
-// params->pTable = page_table;
-#endif // FULL_SYSTEM
params->mem = mem;
params->checker = checker;
diff --git a/src/cpu/ozone/simple_params.hh b/src/cpu/ozone/simple_params.hh
index b241dea73..228b78128 100644
--- a/src/cpu/ozone/simple_params.hh
+++ b/src/cpu/ozone/simple_params.hh
@@ -56,9 +56,7 @@ class SimpleParams : public BaseCPU::Params
public:
TheISA::TLB *itb; TheISA::TLB *dtb;
-#if !FULL_SYSTEM
std::vector<Process *> workload;
-#endif // FULL_SYSTEM
//Page Table
PageTable *pTable;
diff --git a/src/cpu/ozone/thread_state.hh b/src/cpu/ozone/thread_state.hh
index 638b9d86c..98ecd850c 100644
--- a/src/cpu/ozone/thread_state.hh
+++ b/src/cpu/ozone/thread_state.hh
@@ -45,14 +45,11 @@
class Event;
//class Process;
-#if FULL_SYSTEM
class EndQuiesceEvent;
+class FunctionalMemory;
class FunctionProfile;
-class ProfileNode;
-#else
class Process;
-class FunctionalMemory;
-#endif
+class ProfileNode;
// Maybe this ozone thread state should only really have committed state?
// I need to think about why I'm using this and what it's useful for. Clearly
@@ -66,7 +63,6 @@ struct OzoneThreadState : public ThreadState {
typedef typename Impl::CPUType CPUType;
typedef TheISA::MiscReg MiscReg;
-#if FULL_SYSTEM
OzoneThreadState(CPUType *_cpu, int _thread_num)
: ThreadState(_cpu, -1, _thread_num),
intrflag(0), cpu(_cpu), inSyscall(0), trapPending(0)
@@ -86,14 +82,13 @@ struct OzoneThreadState : public ThreadState {
profilePC = 3;
miscRegFile.clear();
}
-#else
+
OzoneThreadState(CPUType *_cpu, int _thread_num, Process *_process)
: ThreadState(_cpu, -1, _thread_num, _process),
cpu(_cpu), inSyscall(0), trapPending(0)
{
miscRegFile.clear();
}
-#endif
RenameTable<Impl> renameTable;
@@ -147,13 +142,11 @@ struct OzoneThreadState : public ThreadState {
void setNextPC(uint64_t val)
{ nextPC = val; }
-#if FULL_SYSTEM
void dumpFuncProfile()
{
std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name()));
profile->dump(tc, *os);
}
-#endif
};
#endif // __CPU_OZONE_THREAD_STATE_HH__
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-07 10:54:49 +0000