summaryrefslogtreecommitdiff
path: root/src/cpu/ozone
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/ozone')
-rw-r--r--src/cpu/ozone/cpu.hh38
-rw-r--r--src/cpu/ozone/thread_state.hh8
2 files changed, 20 insertions, 26 deletions
diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh
index 55e3813ae..e9550c39b 100644
--- a/src/cpu/ozone/cpu.hh
+++ b/src/cpu/ozone/cpu.hh
@@ -113,8 +113,6 @@ class OzoneCPU : public BaseCPU
int readCpuId() { return thread->cpuId; }
- TranslatingPort *getMemPort() { return /*thread->port*/NULL; }
-
#if FULL_SYSTEM
System *getSystemPtr() { return cpu->system; }
@@ -125,7 +123,17 @@ class OzoneCPU : public BaseCPU
AlphaDTB * getDTBPtr() { return cpu->dtb; }
Kernel::Statistics *getKernelStats() { return thread->kernelStats; }
+
+ FunctionalPort *getPhysPort() { return thread->getPhysPort(); }
+
+ VirtualPort *getVirtPort(ThreadContext *tc = NULL)
+ { return thread->getVirtPort(tc); }
+
+ void delVirtPort(VirtualPort *vp)
+ { thread->delVirtPort(vp); }
#else
+ TranslatingPort *getMemPort() { return thread->port; }
+
Process *getProcessPtr() { return thread->process; }
#endif
@@ -363,23 +371,9 @@ class OzoneCPU : public BaseCPU
AlphaITB *itb;
AlphaDTB *dtb;
System *system;
-
- // the following two fields are redundant, since we can always
- // look them up through the system pointer, but we'll leave them
- // here for now for convenience
- MemoryController *memctrl;
PhysicalMemory *physmem;
#endif
- // L1 instruction cache
-// MemInterface *icacheInterface;
-
- // L1 data cache
-// MemInterface *dcacheInterface;
-
- /** Pointer to memory. */
- FunctionalMemory *mem;
-
FrontEnd *frontEnd;
BackEnd *backEnd;
@@ -424,19 +418,19 @@ class OzoneCPU : public BaseCPU
bool validInstAddr(Addr addr) { return true; }
bool validDataAddr(Addr addr) { return true; }
- Fault translateInstReq(MemReqPtr &req)
+ Fault translateInstReq(Request *req)
{
- return itb->translate(req);
+ return itb->translate(req, tc);
}
- Fault translateDataReadReq(MemReqPtr &req)
+ Fault translateDataReadReq(Request *req)
{
- return dtb->translate(req, false);
+ return dtb->translate(req, tc, false);
}
- Fault translateDataWriteReq(MemReqPtr &req)
+ Fault translateDataWriteReq(Request *req)
{
- return dtb->translate(req, true);
+ return dtb->translate(req, tc, true);
}
#else
diff --git a/src/cpu/ozone/thread_state.hh b/src/cpu/ozone/thread_state.hh
index d5fe7ef48..299878c29 100644
--- a/src/cpu/ozone/thread_state.hh
+++ b/src/cpu/ozone/thread_state.hh
@@ -62,8 +62,8 @@ struct OzoneThreadState : public ThreadState {
typedef TheISA::MiscReg MiscReg;
#if FULL_SYSTEM
- OzoneThreadState(FullCPU *_cpu, int _thread_num, FunctionalMemory *_mem)
- : ThreadState(-1, _thread_num, _mem),
+ OzoneThreadState(FullCPU *_cpu, int _thread_num)
+ : ThreadState(-1, _thread_num),
inSyscall(0), trapPending(0)
{
memset(&regs, 0, sizeof(TheISA::RegFile));
@@ -76,9 +76,9 @@ struct OzoneThreadState : public ThreadState {
memset(&regs, 0, sizeof(TheISA::RegFile));
}
- OzoneThreadState(FullCPU *_cpu, int _thread_num, FunctionalMemory *_mem,
+ OzoneThreadState(FullCPU *_cpu, int _thread_num,
int _asid)
- : ThreadState(-1, _thread_num, _mem, NULL, _asid),
+ : ThreadState(-1, _thread_num, NULL, NULL, _asid),
cpu(_cpu), inSyscall(0), trapPending(0)
{
memset(&regs, 0, sizeof(TheISA::RegFile));