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-rw-r--r--src/cpu/pred/bpred_unit.hh38
1 files changed, 8 insertions, 30 deletions
diff --git a/src/cpu/pred/bpred_unit.hh b/src/cpu/pred/bpred_unit.hh
index c5e73f59d..bef8cb949 100644
--- a/src/cpu/pred/bpred_unit.hh
+++ b/src/cpu/pred/bpred_unit.hh
@@ -52,7 +52,6 @@
#include "base/statistics.hh"
#include "base/types.hh"
#include "cpu/pred/btb.hh"
-#include "cpu/pred/indirect.hh"
#include "cpu/pred/ras.hh"
#include "cpu/inst_seq.hh"
#include "cpu/static_inst.hh"
@@ -98,7 +97,7 @@ class BPredUnit : public SimObject
TheISA::PCState &predPC, ThreadID tid);
// @todo: Rename this function.
- virtual void uncondBranch(ThreadID tid, Addr pc, void * &bp_history) = 0;
+ virtual void uncondBranch(Addr pc, void * &bp_history) = 0;
/**
* Tells the branch predictor to commit any updates until the given
@@ -133,7 +132,7 @@ class BPredUnit : public SimObject
* @param bp_history Pointer to the history object. The predictor
* will need to update any state and delete the object.
*/
- virtual void squash(ThreadID tid, void *bp_history) = 0;
+ virtual void squash(void *bp_history) = 0;
/**
* Looks up a given PC in the BP to see if it is taken or not taken.
@@ -142,7 +141,7 @@ class BPredUnit : public SimObject
* has the branch predictor state associated with the lookup.
* @return Whether the branch is taken or not taken.
*/
- virtual bool lookup(ThreadID tid, Addr instPC, void * &bp_history) = 0;
+ virtual bool lookup(Addr instPC, void * &bp_history) = 0;
/**
* If a branch is not taken, because the BTB address is invalid or missing,
@@ -152,7 +151,7 @@ class BPredUnit : public SimObject
* @param bp_history Pointer that will be set to an object that
* has the branch predictor state associated with the lookup.
*/
- virtual void btbUpdate(ThreadID tid, Addr instPC, void * &bp_history) = 0;
+ virtual void btbUpdate(Addr instPC, void * &bp_history) = 0;
/**
* Looks up a given PC in the BTB to see if a matching entry exists.
@@ -180,15 +179,15 @@ class BPredUnit : public SimObject
* squash operation.
* @todo Make this update flexible enough to handle a global predictor.
*/
- virtual void update(ThreadID tid, Addr instPC, bool taken,
- void *bp_history, bool squashed) = 0;
+ virtual void update(Addr instPC, bool taken, void *bp_history,
+ bool squashed) = 0;
/**
* Deletes the associated history with a branch, performs no predictor
* updates. Used for branches that mispredict and update tables but
* are still speculative and later retire.
* @param bp_history History to delete associated with this predictor
*/
- virtual void retireSquashed(ThreadID tid, void *bp_history) = 0;
+ virtual void retireSquashed(void *bp_history) = 0;
/**
* Updates the BTB with the target of a branch.
@@ -198,9 +197,6 @@ class BPredUnit : public SimObject
void BTBUpdate(Addr instPC, const TheISA::PCState &target)
{ BTB.update(instPC, target, 0); }
-
- virtual unsigned getGHR(ThreadID tid, void* bp_history) const { return 0; }
-
void dump();
private:
@@ -214,7 +210,7 @@ class BPredUnit : public SimObject
ThreadID _tid)
: seqNum(seq_num), pc(instPC), bpHistory(bp_history), RASTarget(0),
RASIndex(0), tid(_tid), predTaken(pred_taken), usedRAS(0), pushedRAS(0),
- wasCall(0), wasReturn(0), wasSquashed(0), wasIndirect(0)
+ wasCall(0), wasReturn(0), wasSquashed(0)
{}
bool operator==(const PredictorHistory &entry) const {
@@ -259,9 +255,6 @@ class BPredUnit : public SimObject
/** Whether this instruction has already mispredicted/updated bp */
bool wasSquashed;
-
- /** Wether this instruction was an indirect branch */
- bool wasIndirect;
};
typedef std::deque<PredictorHistory> History;
@@ -283,12 +276,6 @@ class BPredUnit : public SimObject
/** The per-thread return address stack. */
std::vector<ReturnAddrStack> RAS;
- /** Option to disable indirect predictor. */
- const bool useIndirect;
-
- /** The indirect target predictor. */
- IndirectPredictor iPred;
-
/** Stat for number of BP lookups. */
Stats::Scalar lookups;
/** Stat for number of conditional branches predicted. */
@@ -308,15 +295,6 @@ class BPredUnit : public SimObject
/** Stat for number of times the RAS is incorrect. */
Stats::Scalar RASIncorrect;
- /** Stat for the number of indirect target lookups.*/
- Stats::Scalar indirectLookups;
- /** Stat for the number of indirect target hits.*/
- Stats::Scalar indirectHits;
- /** Stat for the number of indirect target misses.*/
- Stats::Scalar indirectMisses;
- /** Stat for the number of indirect target mispredictions.*/
- Stats::Scalar indirectMispredicted;
-
protected:
/** Number of bits to shift instructions by for predictor addresses. */
const unsigned instShiftAmt;