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-rw-r--r--src/cpu/simple/AtomicSimpleCPU.py3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/simple/AtomicSimpleCPU.py b/src/cpu/simple/AtomicSimpleCPU.py
index e97f059c1..bfd1825c2 100644
--- a/src/cpu/simple/AtomicSimpleCPU.py
+++ b/src/cpu/simple/AtomicSimpleCPU.py
@@ -40,4 +40,5 @@ class AtomicSimpleCPU(BaseCPU):
profile = Param.Latency('0ns', "trace the kernel stack")
icache_port = Port("Instruction Port")
dcache_port = Port("Data Port")
- _mem_ports = ['icache_port', 'dcache_port']
+ physmem_port = Port("Physical Memory Port")
+ _mem_ports = ['icache_port', 'dcache_port', 'physmem_port']