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-rw-r--r--src/cpu/simple/AtomicSimpleCPU.py3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/simple/AtomicSimpleCPU.py b/src/cpu/simple/AtomicSimpleCPU.py
index c747582f6..7a066457d 100644
--- a/src/cpu/simple/AtomicSimpleCPU.py
+++ b/src/cpu/simple/AtomicSimpleCPU.py
@@ -61,3 +61,6 @@ class AtomicSimpleCPU(BaseSimpleCPU):
simulate_data_stalls = Param.Bool(False, "Simulate dcache stall cycles")
simulate_inst_stalls = Param.Bool(False, "Simulate icache stall cycles")
fastmem = Param.Bool(False, "Access memory directly")
+ simpoint_profile = Param.Bool(False, "Generate SimPoint BBVs")
+ simpoint_interval = Param.UInt64(100000000, "SimPoint Interval Size (insts)")
+ simpoint_profile_file = Param.String("simpoint.bb.gz", "SimPoint BBV file")