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-rw-r--r--src/cpu/simple/BaseSimpleCPU.py1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/simple/BaseSimpleCPU.py b/src/cpu/simple/BaseSimpleCPU.py
index d9b963890..a4ae7e34b 100644
--- a/src/cpu/simple/BaseSimpleCPU.py
+++ b/src/cpu/simple/BaseSimpleCPU.py
@@ -34,6 +34,7 @@ from DummyChecker import DummyChecker
class BaseSimpleCPU(BaseCPU):
type = 'BaseSimpleCPU'
abstract = True
+ cxx_header = "cpu/simple/base.hh"
def addCheckerCpu(self):
if buildEnv['TARGET_ISA'] in ['arm']: