summaryrefslogtreecommitdiff
path: root/src/cpu/simple/SConscript
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/simple/SConscript')
-rw-r--r--src/cpu/simple/SConscript4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/simple/SConscript b/src/cpu/simple/SConscript
index ccccab2b5..c090a938c 100644
--- a/src/cpu/simple/SConscript
+++ b/src/cpu/simple/SConscript
@@ -41,5 +41,9 @@ if 'TimingSimpleCPU' in env['CPU_MODELS']:
SimObject('TimingSimpleCPU.py')
Source('timing.cc')
+if 'AtomicSimpleCPU' in env['CPU_MODELS'] or \
+ 'TimingSimpleCPU' in env['CPU_MODELS']:
+ TraceFlag('SimpleCPU')
+
if need_simple_base:
Source('base.cc')