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-rw-r--r--src/cpu/simple/timing.cc7
1 files changed, 1 insertions, 6 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 170c78d3a..12a47fb3e 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -452,12 +452,7 @@ TimingSimpleCPU::completeIfetch(Packet *pkt)
bool
TimingSimpleCPU::IcachePort::recvTiming(Packet *pkt)
{
- if (cpu->_status == DcacheWaitResponse)
- cpu->completeDataAccess(pkt);
- else if (cpu->_status == IcacheWaitResponse)
- cpu->completeIfetch(pkt);
- else
- assert("OOPS" && 0);
+ cpu->completeIfetch(pkt);
return true;
}