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-rw-r--r--src/cpu/simple/timing.cc14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 70b774deb..046b2fe3b 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -540,13 +540,23 @@ TimingSimpleCPU::completeIfetch(PacketPtr pkt)
delete dcache_pkt->req;
delete dcache_pkt;
dcache_pkt = NULL;
+
+ // keep an instruction count
+ if (fault == NoFault)
+ countInst();
}
+
postExecute();
advanceInst(fault);
}
} else {
// non-memory instruction: execute completely now
Fault fault = curStaticInst->execute(this, traceData);
+
+ // keep an instruction count
+ if (fault == NoFault)
+ countInst();
+
postExecute();
advanceInst(fault);
}
@@ -615,6 +625,10 @@ TimingSimpleCPU::completeDataAccess(PacketPtr pkt)
Fault fault = curStaticInst->completeAcc(pkt, this, traceData);
+ // keep an instruction count
+ if (fault == NoFault)
+ countInst();
+
if (pkt->isRead() && pkt->isLocked()) {
TheISA::handleLockedRead(thread, pkt->req);
}