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-rw-r--r--src/cpu/simple/timing.cc40
1 files changed, 40 insertions, 0 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index f1e51ac70..998d0b017 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -293,6 +293,26 @@ TimingSimpleCPU::read(Addr addr, T &data, unsigned flags)
return fault;
}
+Fault
+TimingSimpleCPU::translateDataReadAddr(Addr vaddr, Addr &paddr,
+ int size, unsigned flags)
+{
+ Request *req =
+ new Request(0, vaddr, size, flags, thread->readPC(), cpuId, 0);
+
+ if (traceData) {
+ traceData->setAddr(vaddr);
+ }
+
+ Fault fault = thread->translateDataWriteReq(req);
+
+ if (fault == NoFault)
+ paddr = req->getPaddr();
+
+ delete req;
+ return fault;
+}
+
#ifndef DOXYGEN_SHOULD_SKIP_THIS
template
@@ -411,6 +431,26 @@ TimingSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
return fault;
}
+Fault
+TimingSimpleCPU::translateDataWriteAddr(Addr vaddr, Addr &paddr,
+ int size, unsigned flags)
+{
+ Request *req =
+ new Request(0, vaddr, size, flags, thread->readPC(), cpuId, 0);
+
+ if (traceData) {
+ traceData->setAddr(vaddr);
+ }
+
+ Fault fault = thread->translateDataWriteReq(req);
+
+ if (fault == NoFault)
+ paddr = req->getPaddr();
+
+ delete req;
+ return fault;
+}
+
#ifndef DOXYGEN_SHOULD_SKIP_THIS
template