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-rw-r--r--src/cpu/simple/atomic.cc6
-rw-r--r--src/cpu/simple/atomic.hh2
-rw-r--r--src/cpu/simple/base.hh2
-rw-r--r--src/cpu/simple/exec_context.hh6
-rw-r--r--src/cpu/simple/timing.cc7
-rw-r--r--src/cpu/simple/timing.hh2
6 files changed, 25 insertions, 0 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 77706966b..4afd019d0 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -415,6 +415,12 @@ AtomicSimpleCPU::readMem(Addr addr, uint8_t * data,
}
}
+Fault
+AtomicSimpleCPU::initiateMemRead(Addr addr, unsigned size, unsigned flags)
+{
+ panic("initiateMemRead() is for timing accesses, and should "
+ "never be called on AtomicSimpleCPU.\n");
+}
Fault
AtomicSimpleCPU::writeMem(uint8_t *data, unsigned size,
diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh
index 1a2f19949..c643bfe58 100644
--- a/src/cpu/simple/atomic.hh
+++ b/src/cpu/simple/atomic.hh
@@ -205,6 +205,8 @@ class AtomicSimpleCPU : public BaseSimpleCPU
Fault readMem(Addr addr, uint8_t *data, unsigned size,
unsigned flags) override;
+ Fault initiateMemRead(Addr addr, unsigned size, unsigned flags) override;
+
Fault writeMem(uint8_t *data, unsigned size,
Addr addr, unsigned flags, uint64_t *res) override;
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 0ec9e502b..9164a2960 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -145,6 +145,8 @@ class BaseSimpleCPU : public BaseCPU
virtual Fault readMem(Addr addr, uint8_t* data, unsigned size,
unsigned flags) = 0;
+ virtual Fault initiateMemRead(Addr addr, unsigned size, unsigned flags) = 0;
+
virtual Fault writeMem(uint8_t* data, unsigned size, Addr addr,
unsigned flags, uint64_t* res) = 0;
diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh
index 43a012404..f9d80d0d5 100644
--- a/src/cpu/simple/exec_context.hh
+++ b/src/cpu/simple/exec_context.hh
@@ -291,6 +291,12 @@ class SimpleExecContext : public ExecContext {
return cpu->readMem(addr, data, size, flags);
}
+ Fault initiateMemRead(Addr addr, unsigned int size,
+ unsigned int flags) override
+ {
+ return cpu->initiateMemRead(addr, size, flags);
+ }
+
Fault writeMem(uint8_t *data, unsigned int size, Addr addr,
unsigned int flags, uint64_t *res) override
{
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 6d67f610b..441d5f896 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -407,6 +407,13 @@ Fault
TimingSimpleCPU::readMem(Addr addr, uint8_t *data,
unsigned size, unsigned flags)
{
+ panic("readMem() is for atomic accesses, and should "
+ "never be called on TimingSimpleCPU.\n");
+}
+
+Fault
+TimingSimpleCPU::initiateMemRead(Addr addr, unsigned size, unsigned flags)
+{
SimpleExecContext &t_info = *threadInfo[curThread];
SimpleThread* thread = t_info.thread;
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh
index 36e01e9be..da8320793 100644
--- a/src/cpu/simple/timing.hh
+++ b/src/cpu/simple/timing.hh
@@ -286,6 +286,8 @@ class TimingSimpleCPU : public BaseSimpleCPU
Fault readMem(Addr addr, uint8_t *data, unsigned size,
unsigned flags) override;
+ Fault initiateMemRead(Addr addr, unsigned size, unsigned flags) override;
+
Fault writeMem(uint8_t *data, unsigned size,
Addr addr, unsigned flags, uint64_t *res) override;