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-rw-r--r--src/cpu/simple/atomic.cc1
-rw-r--r--src/cpu/simple/base.cc2
-rw-r--r--src/cpu/simple/timing.cc1
3 files changed, 3 insertions, 1 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 1726db193..d97e7aeec 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -38,6 +38,7 @@
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "params/AtomicSimpleCPU.hh"
+#include "sim/faults.hh"
#include "sim/system.hh"
using namespace std;
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index d7fc81de6..98feb8bf5 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -506,7 +506,7 @@ BaseSimpleCPU::advancePC(Fault fault)
fetchOffset = 0;
if (fault != NoFault) {
curMacroStaticInst = StaticInst::nullStaticInstPtr;
- fault->invoke(tc);
+ fault->invoke(tc, curStaticInst);
predecoder.reset();
} else {
//If we're at the last micro op for this instruction
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 4b093e115..7b45822d6 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -38,6 +38,7 @@
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "params/TimingSimpleCPU.hh"
+#include "sim/faults.hh"
#include "sim/system.hh"
using namespace std;