summaryrefslogtreecommitdiff
path: root/src/cpu/simple
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/simple')
-rw-r--r--src/cpu/simple/base.cc9
-rw-r--r--src/cpu/simple/base.hh6
2 files changed, 7 insertions, 8 deletions
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 9cfbd5f93..2751a346c 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -305,21 +305,20 @@ BaseSimpleCPU::resetStats()
}
void
-BaseSimpleCPU::serializeThread(ostream &os, ThreadID tid)
+BaseSimpleCPU::serializeThread(CheckpointOut &cp, ThreadID tid) const
{
assert(_status == Idle || _status == Running);
assert(tid == 0);
- thread->serialize(os);
+ thread->serialize(cp);
}
void
-BaseSimpleCPU::unserializeThread(Checkpoint *cp, const string &section,
- ThreadID tid)
+BaseSimpleCPU::unserializeThread(CheckpointIn &cp, ThreadID tid)
{
if (tid != 0)
fatal("Trying to load more than one thread into a SimpleCPU\n");
- thread->unserialize(cp, section);
+ thread->unserialize(cp);
}
void
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 6e8b4a8c8..2f7247010 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -278,9 +278,9 @@ class BaseSimpleCPU : public BaseCPU, public ExecContext
// instruction mix histogram by OpClass
Stats::Vector statExecutedInstType;
- void serializeThread(std::ostream &os, ThreadID tid);
- void unserializeThread(Checkpoint *cp, const std::string &section,
- ThreadID tid);
+ void serializeThread(CheckpointOut &cp,
+ ThreadID tid) const M5_ATTR_OVERRIDE;
+ void unserializeThread(CheckpointIn &cp, ThreadID tid) M5_ATTR_OVERRIDE;
// These functions are only used in CPU models that split
// effective address computation from the actual memory access.