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-rw-r--r--src/cpu/simple/atomic.cc14
-rw-r--r--src/cpu/simple/base.cc24
-rw-r--r--src/cpu/simple/base.hh8
-rw-r--r--src/cpu/simple/timing.cc14
4 files changed, 30 insertions, 30 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 2d47f9624..91ac0b6a5 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -70,11 +70,11 @@ AtomicSimpleCPU::init()
BaseCPU::init();
#if FULL_SYSTEM
- for (int i = 0; i < execContexts.size(); ++i) {
- ExecContext *xc = execContexts[i];
+ for (int i = 0; i < threadContexts.size(); ++i) {
+ ThreadContext *tc = threadContexts[i];
// initialize CPU, including PC
- TheISA::initCPU(xc, xc->readCpuId());
+ TheISA::initCPU(tc, tc->readCpuId());
}
#endif
}
@@ -179,11 +179,11 @@ AtomicSimpleCPU::takeOverFrom(BaseCPU *oldCPU)
assert(!tickEvent.scheduled());
- // if any of this CPU's ExecContexts are active, mark the CPU as
+ // if any of this CPU's ThreadContexts are active, mark the CPU as
// running and schedule its tick event.
- for (int i = 0; i < execContexts.size(); ++i) {
- ExecContext *xc = execContexts[i];
- if (xc->status() == ExecContext::Active && _status != Running) {
+ for (int i = 0; i < threadContexts.size(); ++i) {
+ ThreadContext *tc = threadContexts[i];
+ if (tc->status() == ThreadContext::Active && _status != Running) {
_status = Running;
tickEvent.schedule(curTick);
break;
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 12fb4f165..d36aa93a2 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -39,7 +39,7 @@
#include "base/trace.hh"
#include "cpu/base.hh"
#include "cpu/cpu_exec_context.hh"
-#include "cpu/exec_context.hh"
+#include "cpu/thread_context.hh"
#include "cpu/exetrace.hh"
#include "cpu/profile.hh"
#include "cpu/sampler/sampler.hh"
@@ -79,9 +79,9 @@ BaseSimpleCPU::BaseSimpleCPU(Params *p)
/* asid */ 0, mem);
#endif // !FULL_SYSTEM
- cpuXC->setStatus(ExecContext::Suspended);
+ cpuXC->setStatus(ThreadContext::Suspended);
- xcProxy = cpuXC->getProxy();
+ tc = cpuXC->getTC();
numInst = 0;
startNumInst = 0;
@@ -90,7 +90,7 @@ BaseSimpleCPU::BaseSimpleCPU(Params *p)
lastIcacheStall = 0;
lastDcacheStall = 0;
- execContexts.push_back(xcProxy);
+ threadContexts.push_back(tc);
}
BaseSimpleCPU::~BaseSimpleCPU()
@@ -290,7 +290,7 @@ BaseSimpleCPU::copy(Addr dest)
Addr
BaseSimpleCPU::dbg_vtophys(Addr addr)
{
- return vtophys(xcProxy, addr);
+ return vtophys(tc, addr);
}
#endif // FULL_SYSTEM
@@ -300,7 +300,7 @@ BaseSimpleCPU::post_interrupt(int int_num, int index)
{
BaseCPU::post_interrupt(int_num, index);
- if (cpuXC->status() == ExecContext::Suspended) {
+ if (cpuXC->status() == ThreadContext::Suspended) {
DPRINTF(IPI,"Suspended Processor awoke\n");
cpuXC->activate();
}
@@ -344,7 +344,7 @@ BaseSimpleCPU::checkForInterrupts()
cpuXC->setMiscReg(IPR_ISR, summary);
cpuXC->setMiscReg(IPR_INTID, ipl);
- Fault(new InterruptFault)->invoke(xcProxy);
+ Fault(new InterruptFault)->invoke(tc);
DPRINTF(Flow, "Interrupt! IPLR=%d ipl=%d summary=%x\n",
cpuXC->readMiscReg(IPR_IPLR), ipl, summary);
@@ -393,7 +393,7 @@ BaseSimpleCPU::preExecute()
inst = gtoh(inst);
curStaticInst = StaticInst::decode(makeExtMI(inst, cpuXC->readPC()));
- traceData = Trace::getInstRecord(curTick, xcProxy, this, curStaticInst,
+ traceData = Trace::getInstRecord(curTick, tc, this, curStaticInst,
cpuXC->readPC());
DPRINTF(Decode,"Decode: Decoded %s instruction (opcode: 0x%x): 0x%x\n",
@@ -411,14 +411,14 @@ BaseSimpleCPU::postExecute()
#if FULL_SYSTEM
if (system->kernelBinning->fnbin) {
assert(cpuXC->getKernelStats());
- system->kernelBinning->execute(xcProxy, inst);
+ system->kernelBinning->execute(tc, inst);
}
if (cpuXC->profile) {
bool usermode =
(cpuXC->readMiscReg(AlphaISA::IPR_DTB_CM) & 0x18) != 0;
cpuXC->profilePC = usermode ? 1 : cpuXC->readPC();
- ProfileNode *node = cpuXC->profile->consume(xcProxy, inst);
+ ProfileNode *node = cpuXC->profile->consume(tc, inst);
if (node)
cpuXC->profileNode = node;
}
@@ -446,7 +446,7 @@ BaseSimpleCPU::advancePC(Fault fault)
{
if (fault != NoFault) {
#if FULL_SYSTEM
- fault->invoke(xcProxy);
+ fault->invoke(tc);
#else // !FULL_SYSTEM
fatal("fault (%s) detected @ PC %08p", fault->name(), cpuXC->readPC());
#endif // FULL_SYSTEM
@@ -467,7 +467,7 @@ BaseSimpleCPU::advancePC(Fault fault)
Addr oldpc;
do {
oldpc = cpuXC->readPC();
- system->pcEventQueue.service(xcProxy);
+ system->pcEventQueue.service(tc);
} while (oldpc != cpuXC->readPC());
#endif
}
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index e7d90f95d..bc17ece56 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -61,7 +61,7 @@ class Process;
#endif // FULL_SYSTEM
-class ExecContext;
+class ThreadContext;
class Checkpoint;
namespace Trace {
@@ -111,7 +111,7 @@ class BaseSimpleCPU : public BaseCPU
// execution context
CPUExecContext *cpuXC;
- ExecContext *xcProxy;
+ ThreadContext *tc;
#if FULL_SYSTEM
Addr dbg_vtophys(Addr addr);
@@ -307,14 +307,14 @@ class BaseSimpleCPU : public BaseCPU
int readIntrFlag() { return cpuXC->readIntrFlag(); }
void setIntrFlag(int val) { cpuXC->setIntrFlag(val); }
bool inPalMode() { return cpuXC->inPalMode(); }
- void ev5_trap(Fault fault) { fault->invoke(xcProxy); }
+ void ev5_trap(Fault fault) { fault->invoke(tc); }
bool simPalCheck(int palFunc) { return cpuXC->simPalCheck(palFunc); }
#else
void syscall(int64_t callnum) { cpuXC->syscall(callnum); }
#endif
bool misspeculating() { return cpuXC->misspeculating(); }
- ExecContext *xcBase() { return xcProxy; }
+ ThreadContext *tcBase() { return tc; }
};
#endif // __CPU_SIMPLE_BASE_HH__
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 1e5a628c7..00c6de037 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -52,11 +52,11 @@ TimingSimpleCPU::init()
BaseCPU::init();
#if FULL_SYSTEM
- for (int i = 0; i < execContexts.size(); ++i) {
- ExecContext *xc = execContexts[i];
+ for (int i = 0; i < threadContexts.size(); ++i) {
+ ThreadContext *tc = threadContexts[i];
// initialize CPU, including PC
- TheISA::initCPU(xc, xc->readCpuId());
+ TheISA::initCPU(tc, tc->readCpuId());
}
#endif
}
@@ -125,11 +125,11 @@ TimingSimpleCPU::takeOverFrom(BaseCPU *oldCPU)
{
BaseCPU::takeOverFrom(oldCPU);
- // if any of this CPU's ExecContexts are active, mark the CPU as
+ // if any of this CPU's ThreadContexts are active, mark the CPU as
// running and schedule its tick event.
- for (int i = 0; i < execContexts.size(); ++i) {
- ExecContext *xc = execContexts[i];
- if (xc->status() == ExecContext::Active && _status != Running) {
+ for (int i = 0; i < threadContexts.size(); ++i) {
+ ThreadContext *tc = threadContexts[i];
+ if (tc->status() == ThreadContext::Active && _status != Running) {
_status = Running;
break;
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-02 18:57:14 +0000