diff options
Diffstat (limited to 'src/cpu/simple')
| -rw-r--r-- | src/cpu/simple/atomic.cc | 8 | ||||
| -rw-r--r-- | src/cpu/simple/atomic.hh | 6 | ||||
| -rw-r--r-- | src/cpu/simple/timing.cc | 8 | ||||
| -rw-r--r-- | src/cpu/simple/timing.hh | 6 |
4 files changed, 14 insertions, 14 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index e01f9e17b..5376519d4 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -299,8 +299,8 @@ AtomicSimpleCPU::suspendContext(int thread_num) Fault -AtomicSimpleCPU::readBytes(Addr addr, uint8_t * data, - unsigned size, unsigned flags) +AtomicSimpleCPU::readMem(Addr addr, uint8_t * data, + unsigned size, unsigned flags) { // use the CPU's statically allocated read request and packet objects Request *req = &data_read_req; @@ -387,8 +387,8 @@ AtomicSimpleCPU::readBytes(Addr addr, uint8_t * data, Fault -AtomicSimpleCPU::writeBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res) +AtomicSimpleCPU::writeMem(uint8_t *data, unsigned size, + Addr addr, unsigned flags, uint64_t *res) { // use the CPU's statically allocated write request and packet objects Request *req = &data_write_req; diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh index 75a83caa7..246afa0b2 100644 --- a/src/cpu/simple/atomic.hh +++ b/src/cpu/simple/atomic.hh @@ -131,10 +131,10 @@ class AtomicSimpleCPU : public BaseSimpleCPU virtual void activateContext(int thread_num, int delay); virtual void suspendContext(int thread_num); - Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags); + Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags); - Fault writeBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res); + Fault writeMem(uint8_t *data, unsigned size, + Addr addr, unsigned flags, uint64_t *res); /** * Print state of address in memory system via PrintReq (for diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 853834d1d..1c726ba57 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -432,8 +432,8 @@ TimingSimpleCPU::buildSplitPacket(PacketPtr &pkt1, PacketPtr &pkt2, } Fault -TimingSimpleCPU::readBytes(Addr addr, uint8_t *data, - unsigned size, unsigned flags) +TimingSimpleCPU::readMem(Addr addr, uint8_t *data, + unsigned size, unsigned flags) { Fault fault; const int asid = 0; @@ -500,8 +500,8 @@ TimingSimpleCPU::handleWritePacket() } Fault -TimingSimpleCPU::writeBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res) +TimingSimpleCPU::writeMem(uint8_t *data, unsigned size, + Addr addr, unsigned flags, uint64_t *res) { uint8_t *newData = new uint8_t[size]; memcpy(newData, data, size); diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index 7525031c5..4301dfca7 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -256,10 +256,10 @@ class TimingSimpleCPU : public BaseSimpleCPU virtual void activateContext(int thread_num, int delay); virtual void suspendContext(int thread_num); - Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags); + Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags); - Fault writeBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res); + Fault writeMem(uint8_t *data, unsigned size, + Addr addr, unsigned flags, uint64_t *res); void fetch(); void sendFetch(Fault fault, RequestPtr req, ThreadContext *tc); |