summaryrefslogtreecommitdiff
path: root/src/cpu/static_inst.hh
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/static_inst.hh')
-rw-r--r--src/cpu/static_inst.hh19
1 files changed, 6 insertions, 13 deletions
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index bea52f510..ea1a65148 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -34,10 +34,12 @@
#include <bitset>
#include <string>
+#include "base/bitfield.hh"
#include "base/hashmap.hh"
#include "base/misc.hh"
#include "base/refcnt.hh"
#include "cpu/op_class.hh"
+#include "cpu/o3/dyn_inst.hh"
#include "sim/host.hh"
#include "arch/isa_traits.hh"
@@ -50,9 +52,6 @@ class DynInst;
class Packet;
template <class Impl>
-class AlphaDynInst;
-
-template <class Impl>
class OzoneDynInst;
class CheckerCPU;
@@ -411,16 +410,10 @@ class StaticInst : public StaticInstBase
//This is defined as inline below.
static StaticInstPtr decode(ExtMachInst mach_inst);
- //MIPS Decoder Debug Functions
- int getOpcode() { return (machInst & 0xFC000000) >> 26 ; }//31..26
- int getRs() { return (machInst & 0x03E00000) >> 21; } //25...21
- int getRt() { return (machInst & 0x001F0000) >> 16; } //20...16
- int getRd() { return (machInst & 0x0000F800) >> 11; } //15...11
- int getImm() { return (machInst & 0x0000FFFF); } //15...0
- int getFunction(){ return (machInst & 0x0000003F); }//5...0
- int getBranch(){ return (machInst & 0x0000FFFF); }//15...0
- int getJump(){ return (machInst & 0x03FFFFFF); }//5...0
- int getHint(){ return (machInst & 0x000007C0) >> 6; } //10...6
+ /// Return opcode of machine instruction
+ uint32_t getOpcode() { return bits(machInst, 31, 26);}
+
+ /// Return name of machine instruction
std::string getName() { return mnemonic; }
};