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-rw-r--r--src/cpu/static_inst.hh10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index 6f6cf45da..bea52f510 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -45,7 +45,7 @@
struct AlphaSimpleImpl;
struct OzoneImpl;
struct SimpleImpl;
-class ExecContext;
+class ThreadContext;
class DynInst;
class Packet;
@@ -357,12 +357,12 @@ class StaticInst : public StaticInstBase
/**
* Return the target address for an indirect branch (jump). The
- * register value is read from the supplied execution context, so
- * the result is valid only if the execution context is about to
+ * register value is read from the supplied thread context, so
+ * the result is valid only if the thread context is about to
* execute the branch in question. Invalid if not an indirect
* branch (i.e. isIndirectCtrl() should be true).
*/
- virtual Addr branchTarget(ExecContext *xc) const
+ virtual Addr branchTarget(ThreadContext *tc) const
{
panic("StaticInst::branchTarget() called on instruction "
"that is not an indirect branch.");
@@ -372,7 +372,7 @@ class StaticInst : public StaticInstBase
* Return true if the instruction is a control transfer, and if so,
* return the target address as well.
*/
- bool hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt) const;
+ bool hasBranchTarget(Addr pc, ThreadContext *tc, Addr &tgt) const;
/**
* Return string representation of disassembled instruction.