diff options
Diffstat (limited to 'src/cpu/testers/directedtest')
| -rw-r--r-- | src/cpu/testers/directedtest/InvalidateGenerator.cc | 8 | ||||
| -rw-r--r-- | src/cpu/testers/directedtest/RubyDirectedTester.hh | 2 | ||||
| -rw-r--r-- | src/cpu/testers/directedtest/SeriesRequestGenerator.cc | 4 |
3 files changed, 5 insertions, 9 deletions
diff --git a/src/cpu/testers/directedtest/InvalidateGenerator.cc b/src/cpu/testers/directedtest/InvalidateGenerator.cc index 4c248ea05..a89853061 100644 --- a/src/cpu/testers/directedtest/InvalidateGenerator.cc +++ b/src/cpu/testers/directedtest/InvalidateGenerator.cc @@ -52,7 +52,7 @@ InvalidateGenerator::~InvalidateGenerator() bool InvalidateGenerator::initiate() { - RubyDirectedTester::CpuPort* port; + MasterPort* port; Request::Flags flags; PacketPtr pkt; Packet::Command cmd; @@ -66,14 +66,12 @@ InvalidateGenerator::initiate() if (m_status == InvalidateGeneratorStatus_Load_Waiting) { DPRINTF(DirectedTest, "initiating read\n"); cmd = MemCmd::ReadReq; - port = safe_cast<RubyDirectedTester::CpuPort*>(m_directed_tester-> - getCpuPort(m_active_read_node)); + port = m_directed_tester->getCpuPort(m_active_read_node); pkt = new Packet(req, cmd); } else if (m_status == InvalidateGeneratorStatus_Inv_Waiting) { DPRINTF(DirectedTest, "initiating invalidating write\n"); cmd = MemCmd::WriteReq; - port = safe_cast<RubyDirectedTester::CpuPort*>(m_directed_tester-> - getCpuPort(m_active_inv_node)); + port = m_directed_tester->getCpuPort(m_active_inv_node); pkt = new Packet(req, cmd); } else { panic("initiate was unexpectedly called\n"); diff --git a/src/cpu/testers/directedtest/RubyDirectedTester.hh b/src/cpu/testers/directedtest/RubyDirectedTester.hh index 0965fb786..bd0b52a90 100644 --- a/src/cpu/testers/directedtest/RubyDirectedTester.hh +++ b/src/cpu/testers/directedtest/RubyDirectedTester.hh @@ -113,7 +113,7 @@ class RubyDirectedTester : public MemObject RubyDirectedTester& operator=(const RubyDirectedTester& obj); uint64 m_requests_completed; - std::vector<CpuPort*> ports; + std::vector<MasterPort*> ports; uint64 m_requests_to_complete; DirectedGenerator* generator; }; diff --git a/src/cpu/testers/directedtest/SeriesRequestGenerator.cc b/src/cpu/testers/directedtest/SeriesRequestGenerator.cc index 92dc46f85..b8c42b67d 100644 --- a/src/cpu/testers/directedtest/SeriesRequestGenerator.cc +++ b/src/cpu/testers/directedtest/SeriesRequestGenerator.cc @@ -52,9 +52,7 @@ SeriesRequestGenerator::initiate() DPRINTF(DirectedTest, "initiating request\n"); assert(m_status == SeriesRequestGeneratorStatus_Thinking); - RubyDirectedTester::CpuPort* port = - safe_cast<RubyDirectedTester::CpuPort*>(m_directed_tester-> - getCpuPort(m_active_node)); + MasterPort* port = m_directed_tester->getCpuPort(m_active_node); Request::Flags flags; |