diff options
Diffstat (limited to 'src/cpu/testers/rubytest/RubyTester.cc')
-rw-r--r-- | src/cpu/testers/rubytest/RubyTester.cc | 70 |
1 files changed, 51 insertions, 19 deletions
diff --git a/src/cpu/testers/rubytest/RubyTester.cc b/src/cpu/testers/rubytest/RubyTester.cc index e0f30f552..5ed6d7f66 100644 --- a/src/cpu/testers/rubytest/RubyTester.cc +++ b/src/cpu/testers/rubytest/RubyTester.cc @@ -58,7 +58,8 @@ RubyTester::RubyTester(const Params *p) m_num_readers(0), m_wakeup_frequency(p->wakeup_frequency), m_check_flush(p->check_flush), - m_num_inst_ports(p->port_cpuInstPort_connection_count) + m_num_inst_only_ports(p->port_cpuInstPort_connection_count), + m_num_inst_data_ports(p->port_cpuInstDataPort_connection_count) { m_checks_completed = 0; @@ -73,15 +74,25 @@ RubyTester::RubyTester(const Params *p) // Note: the inst ports are the lowest elements of the readPort vector, // then the data ports are added to the readPort vector // + int idx = 0; for (int i = 0; i < p->port_cpuInstPort_connection_count; ++i) { readPorts.push_back(new CpuPort(csprintf("%s-instPort%d", name(), i), - this, i)); + this, i, idx)); + idx++; + } + for (int i = 0; i < p->port_cpuInstDataPort_connection_count; ++i) { + CpuPort *port = new CpuPort(csprintf("%s-instDataPort%d", name(), i), + this, i, idx); + readPorts.push_back(port); + writePorts.push_back(port); + idx++; } for (int i = 0; i < p->port_cpuDataPort_connection_count; ++i) { CpuPort *port = new CpuPort(csprintf("%s-dataPort%d", name(), i), - this, i); + this, i, idx); readPorts.push_back(port); writePorts.push_back(port); + idx++; } // add the check start event to the event queue @@ -108,6 +119,7 @@ RubyTester::init() m_num_writers = writePorts.size(); m_num_readers = readPorts.size(); + assert(m_num_readers == m_num_cpus); m_checkTable_ptr = new CheckTable(m_num_writers, m_num_readers, this); } @@ -115,32 +127,45 @@ RubyTester::init() BaseMasterPort & RubyTester::getMasterPort(const std::string &if_name, PortID idx) { - if (if_name != "cpuInstPort" && if_name != "cpuDataPort") { + if (if_name != "cpuInstPort" && if_name != "cpuInstDataPort" && + if_name != "cpuDataPort") { // pass it along to our super class return MemObject::getMasterPort(if_name, idx); } else { if (if_name == "cpuInstPort") { - if (idx > m_num_inst_ports) { - panic("RubyTester::getMasterPort: unknown inst port idx %d\n", + if (idx > m_num_inst_only_ports) { + panic("RubyTester::getMasterPort: unknown inst port %d\n", idx); } // - // inst ports directly map to the lowest readPort elements + // inst ports map to the lowest readPort elements // return *readPorts[idx]; + } else if (if_name == "cpuInstDataPort") { + if (idx > m_num_inst_data_ports) { + panic("RubyTester::getMasterPort: unknown inst+data port %d\n", + idx); + } + int read_idx = idx + m_num_inst_only_ports; + // + // inst+data ports map to the next readPort elements + // + return *readPorts[read_idx]; } else { assert(if_name == "cpuDataPort"); // - // add the inst port offset to translate to the correct read port - // index + // data only ports map to the final readPort elements // - int read_idx = idx + m_num_inst_ports; - if (read_idx >= static_cast<PortID>(readPorts.size())) { - panic("RubyTester::getMasterPort: unknown data port idx %d\n", + if (idx > (static_cast<int>(readPorts.size()) - + (m_num_inst_only_ports + m_num_inst_data_ports))) { + panic("RubyTester::getMasterPort: unknown data port %d\n", idx); } + int read_idx = idx + m_num_inst_only_ports + m_num_inst_data_ports; return *readPorts[read_idx]; } + // Note: currently the Ruby Tester does not support write only ports + // but that could easily be added here } } @@ -152,7 +177,7 @@ RubyTester::CpuPort::recvTimingResp(PacketPtr pkt) safe_cast<RubyTester::SenderState*>(pkt->senderState); SubBlock& subblock = senderState->subBlock; - tester->hitCallback(id, &subblock); + tester->hitCallback(globalIdx, &subblock); // Now that the tester has completed, delete the senderState // (includes sublock) and the packet, then return @@ -163,9 +188,16 @@ RubyTester::CpuPort::recvTimingResp(PacketPtr pkt) } bool -RubyTester::isInstReadableCpuPort(int idx) +RubyTester::isInstOnlyCpuPort(int idx) +{ + return idx < m_num_inst_only_ports; +} + +bool +RubyTester::isInstDataCpuPort(int idx) { - return idx < m_num_inst_ports; + return ((idx >= m_num_inst_only_ports) && + (idx < (m_num_inst_only_ports + m_num_inst_data_ports))); } MasterPort* @@ -190,13 +222,13 @@ RubyTester::hitCallback(NodeID proc, SubBlock* data) // Mark that we made progress m_last_progress_vector[proc] = curCycle(); - DPRINTF(RubyTest, "completed request for proc: %d\n", proc); - DPRINTF(RubyTest, "addr: 0x%x, size: %d, data: ", + DPRINTF(RubyTest, "completed request for proc: %d", proc); + DPRINTFR(RubyTest, " addr: 0x%x, size: %d, data: ", data->getAddress(), data->getSize()); for (int byte = 0; byte < data->getSize(); byte++) { - DPRINTF(RubyTest, "%d", data->getByte(byte)); + DPRINTFR(RubyTest, "%d ", data->getByte(byte)); } - DPRINTF(RubyTest, "\n"); + DPRINTFR(RubyTest, "\n"); // This tells us our store has 'completed' or for a load gives us // back the data to make the check |