diff options
Diffstat (limited to 'src/cpu/trace')
-rw-r--r-- | src/cpu/trace/opt_cpu.cc | 4 | ||||
-rw-r--r-- | src/cpu/trace/opt_cpu.hh | 2 | ||||
-rw-r--r-- | src/cpu/trace/reader/ibm_reader.cc | 2 | ||||
-rw-r--r-- | src/cpu/trace/reader/ibm_reader.hh | 2 | ||||
-rw-r--r-- | src/cpu/trace/reader/itx_reader.cc | 2 | ||||
-rw-r--r-- | src/cpu/trace/reader/itx_reader.hh | 2 | ||||
-rw-r--r-- | src/cpu/trace/reader/m5_reader.cc | 2 | ||||
-rw-r--r-- | src/cpu/trace/reader/m5_reader.hh | 2 | ||||
-rw-r--r-- | src/cpu/trace/reader/mem_trace_reader.cc | 2 | ||||
-rw-r--r-- | src/cpu/trace/reader/mem_trace_reader.hh | 2 | ||||
-rw-r--r-- | src/cpu/trace/trace_cpu.cc | 4 | ||||
-rw-r--r-- | src/cpu/trace/trace_cpu.hh | 2 |
12 files changed, 26 insertions, 2 deletions
diff --git a/src/cpu/trace/opt_cpu.cc b/src/cpu/trace/opt_cpu.cc index 6cd23b0dd..996e89f01 100644 --- a/src/cpu/trace/opt_cpu.cc +++ b/src/cpu/trace/opt_cpu.cc @@ -24,6 +24,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Erik Hallnor */ /** @@ -174,7 +176,7 @@ OptCPU::tick() fprintf(stderr,"sys.cpu.misses %d #opt cache misses\n",misses); fprintf(stderr,"sys.cpu.hits %d #opt cache hits\n", hits); fprintf(stderr,"sys.cpu.accesses %d #opt cache acceses\n", references); - new SimExitEvent("Finshed Memory Trace"); + exitSimLoop("end of memory trace reached"); } void diff --git a/src/cpu/trace/opt_cpu.hh b/src/cpu/trace/opt_cpu.hh index f81691733..dfb122319 100644 --- a/src/cpu/trace/opt_cpu.hh +++ b/src/cpu/trace/opt_cpu.hh @@ -24,6 +24,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Erik Hallnor */ /** diff --git a/src/cpu/trace/reader/ibm_reader.cc b/src/cpu/trace/reader/ibm_reader.cc index 420101b63..87e13f307 100644 --- a/src/cpu/trace/reader/ibm_reader.cc +++ b/src/cpu/trace/reader/ibm_reader.cc @@ -24,6 +24,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Erik Hallnor */ /** diff --git a/src/cpu/trace/reader/ibm_reader.hh b/src/cpu/trace/reader/ibm_reader.hh index ce29206a2..a72f62e03 100644 --- a/src/cpu/trace/reader/ibm_reader.hh +++ b/src/cpu/trace/reader/ibm_reader.hh @@ -24,6 +24,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Erik Hallnor */ /** diff --git a/src/cpu/trace/reader/itx_reader.cc b/src/cpu/trace/reader/itx_reader.cc index 39ba27393..e4738eed8 100644 --- a/src/cpu/trace/reader/itx_reader.cc +++ b/src/cpu/trace/reader/itx_reader.cc @@ -24,6 +24,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Erik Hallnor */ /** diff --git a/src/cpu/trace/reader/itx_reader.hh b/src/cpu/trace/reader/itx_reader.hh index a16a08085..63a4c9ac9 100644 --- a/src/cpu/trace/reader/itx_reader.hh +++ b/src/cpu/trace/reader/itx_reader.hh @@ -24,6 +24,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Erik Hallnor */ /** diff --git a/src/cpu/trace/reader/m5_reader.cc b/src/cpu/trace/reader/m5_reader.cc index ce44672f2..8efcb022b 100644 --- a/src/cpu/trace/reader/m5_reader.cc +++ b/src/cpu/trace/reader/m5_reader.cc @@ -24,6 +24,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Erik Hallnor */ /** diff --git a/src/cpu/trace/reader/m5_reader.hh b/src/cpu/trace/reader/m5_reader.hh index 974a83ffa..5007bfd5b 100644 --- a/src/cpu/trace/reader/m5_reader.hh +++ b/src/cpu/trace/reader/m5_reader.hh @@ -24,6 +24,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Erik Hallnor */ /** diff --git a/src/cpu/trace/reader/mem_trace_reader.cc b/src/cpu/trace/reader/mem_trace_reader.cc index 769f0be27..5623f168a 100644 --- a/src/cpu/trace/reader/mem_trace_reader.cc +++ b/src/cpu/trace/reader/mem_trace_reader.cc @@ -24,6 +24,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Erik Hallnor */ /** diff --git a/src/cpu/trace/reader/mem_trace_reader.hh b/src/cpu/trace/reader/mem_trace_reader.hh index b433cdbdd..628a3ecdc 100644 --- a/src/cpu/trace/reader/mem_trace_reader.hh +++ b/src/cpu/trace/reader/mem_trace_reader.hh @@ -24,6 +24,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Erik Hallnor */ /** diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc index 20d0a567f..3c9da4849 100644 --- a/src/cpu/trace/trace_cpu.cc +++ b/src/cpu/trace/trace_cpu.cc @@ -24,6 +24,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Erik Hallnor */ /** @@ -106,7 +108,7 @@ TraceCPU::tick() if (!nextReq) { // No more requests to send. Finish trailing events and exit. if (mainEventQueue.empty()) { - new SimExitEvent("Finshed Memory Trace"); + exitSimLoop("end of memory trace reached"); } else { tickEvent.schedule(mainEventQueue.nextEventTime() + cycles(1)); } diff --git a/src/cpu/trace/trace_cpu.hh b/src/cpu/trace/trace_cpu.hh index 69ca35321..9c96d71d5 100644 --- a/src/cpu/trace/trace_cpu.hh +++ b/src/cpu/trace/trace_cpu.hh @@ -24,6 +24,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Erik Hallnor */ /** |