diff options
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/base.cc | 8 | ||||
-rw-r--r-- | src/cpu/base.hh | 17 | ||||
-rw-r--r-- | src/cpu/intr_control.cc | 4 | ||||
-rw-r--r-- | src/cpu/o3/commit_impl.hh | 4 | ||||
-rw-r--r-- | src/cpu/o3/cpu.cc | 4 | ||||
-rw-r--r-- | src/cpu/o3/cpu.hh | 2 | ||||
-rwxr-xr-x | src/cpu/o3/thread_context_impl.hh | 2 | ||||
-rw-r--r-- | src/cpu/ozone/cpu.hh | 2 | ||||
-rw-r--r-- | src/cpu/ozone/cpu_impl.hh | 4 | ||||
-rw-r--r-- | src/cpu/ozone/inorder_back_end_impl.hh | 3 | ||||
-rw-r--r-- | src/cpu/ozone/lw_back_end_impl.hh | 5 | ||||
-rw-r--r-- | src/cpu/simple/base.cc | 6 | ||||
-rw-r--r-- | src/cpu/simple/base.hh | 2 | ||||
-rw-r--r-- | src/cpu/simple_thread.cc | 2 |
14 files changed, 31 insertions, 34 deletions
diff --git a/src/cpu/base.cc b/src/cpu/base.cc index def1e9920..8c461cccb 100644 --- a/src/cpu/base.cc +++ b/src/cpu/base.cc @@ -379,21 +379,21 @@ BaseCPU::ProfileEvent::process() } void -BaseCPU::post_interrupt(int int_num, int index) +BaseCPU::postInterrupt(int int_num, int index) { interrupts->post(int_num, index); } void -BaseCPU::clear_interrupt(int int_num, int index) +BaseCPU::clearInterrupt(int int_num, int index) { interrupts->clear(int_num, index); } void -BaseCPU::clear_interrupts() +BaseCPU::clearInterrupts() { - interrupts->clear_all(); + interrupts->clearAll(); } void diff --git a/src/cpu/base.hh b/src/cpu/base.hh index b0eece2a1..2d25c9e56 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -108,9 +108,7 @@ class BaseCPU : public MemObject #if FULL_SYSTEM protected: -// uint64_t interrupts[TheISA::NumInterruptLevels]; -// uint64_t intstatus; - TheISA::Interrupts * interrupts; + TheISA::Interrupts *interrupts; public: TheISA::Interrupts * @@ -119,12 +117,15 @@ class BaseCPU : public MemObject return interrupts; } - virtual void post_interrupt(int int_num, int index); - virtual void clear_interrupt(int int_num, int index); - virtual void clear_interrupts(); + virtual void postInterrupt(int int_num, int index); + virtual void clearInterrupt(int int_num, int index); + virtual void clearInterrupts(); - bool check_interrupts(ThreadContext * tc) const - { return interrupts->check_interrupts(tc); } + bool + checkInterrupts(ThreadContext *tc) const + { + return interrupts->checkInterrupts(tc); + } class ProfileEvent : public Event { diff --git a/src/cpu/intr_control.cc b/src/cpu/intr_control.cc index c3a11ad91..de7f9245e 100644 --- a/src/cpu/intr_control.cc +++ b/src/cpu/intr_control.cc @@ -50,7 +50,7 @@ IntrControl::post(int cpu_id, int int_num, int index) DPRINTF(IntrControl, "post %d:%d (cpu %d)\n", int_num, index, cpu_id); std::vector<ThreadContext *> &tcvec = sys->threadContexts; BaseCPU *cpu = tcvec[cpu_id]->getCpuPtr(); - cpu->post_interrupt(int_num, index); + cpu->postInterrupt(int_num, index); } void @@ -59,7 +59,7 @@ IntrControl::clear(int cpu_id, int int_num, int index) DPRINTF(IntrControl, "clear %d:%d (cpu %d)\n", int_num, index, cpu_id); std::vector<ThreadContext *> &tcvec = sys->threadContexts; BaseCPU *cpu = tcvec[cpu_id]->getCpuPtr(); - cpu->clear_interrupt(int_num, index); + cpu->clearInterrupt(int_num, index); } IntrControl * diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index 68fc6ef3b..46c4158f6 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -665,7 +665,7 @@ DefaultCommit<Impl>::handleInterrupt() DPRINTF(Commit, "Interrupt pending, waiting for ROB to empty.\n"); } } else if (commitStatus[0] != TrapPending && - cpu->check_interrupts(cpu->tcBase(0)) && + cpu->checkInterrupts(cpu->tcBase(0)) && !trapSquash[0] && !tcSquash[0]) { // Process interrupts if interrupts are enabled, not in PAL @@ -695,7 +695,7 @@ DefaultCommit<Impl>::commit() // Check for any interrupt, and start processing it. Or if we // have an outstanding interrupt and are at a point when it is // valid to take an interrupt, process it. - if (cpu->check_interrupts(cpu->tcBase(0))) { + if (cpu->checkInterrupts(cpu->tcBase(0))) { handleInterrupt(); } #endif // FULL_SYSTEM diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 41b7e8b14..04f344930 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -895,9 +895,9 @@ FullO3CPU<Impl>::activateWhenReady(int tid) #if FULL_SYSTEM template <class Impl> void -FullO3CPU<Impl>::post_interrupt(int int_num, int index) +FullO3CPU<Impl>::postInterrupt(int int_num, int index) { - BaseCPU::post_interrupt(int_num, index); + BaseCPU::postInterrupt(int_num, index); if (this->thread[0]->status() == ThreadContext::Suspended) { DPRINTF(IPI,"Suspended Processor awoke\n"); diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index 406d965be..8cfc9affa 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -412,7 +412,7 @@ class FullO3CPU : public BaseO3CPU #if FULL_SYSTEM /** Posts an interrupt. */ - void post_interrupt(int int_num, int index); + void postInterrupt(int int_num, int index); /** HW return from error interrupt. */ Fault hwrei(unsigned tid); diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh index a521c3636..d8ec70bb8 100755 --- a/src/cpu/o3/thread_context_impl.hh +++ b/src/cpu/o3/thread_context_impl.hh @@ -132,7 +132,7 @@ O3ThreadContext<Impl>::suspend(int delay) /* #if FULL_SYSTEM // Don't change the status from active if there are pending interrupts - if (cpu->check_interrupts()) { + if (cpu->checkInterrupts()) { assert(status() == ThreadContext::Active); return; } diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh index 845cbbd95..491e6ba93 100644 --- a/src/cpu/ozone/cpu.hh +++ b/src/cpu/ozone/cpu.hh @@ -332,7 +332,7 @@ class OzoneCPU : public BaseCPU Status _status; public: - void post_interrupt(int int_num, int index); + void postInterrupt(int int_num, int index); void zero_fill_64(Addr addr) { static int warned = 0; diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh index c8e0dfe3d..a7efa3596 100644 --- a/src/cpu/ozone/cpu_impl.hh +++ b/src/cpu/ozone/cpu_impl.hh @@ -579,9 +579,9 @@ OzoneCPU<Impl>::dbg_vtophys(Addr addr) #if FULL_SYSTEM template <class Impl> void -OzoneCPU<Impl>::post_interrupt(int int_num, int index) +OzoneCPU<Impl>::postInterrupt(int int_num, int index) { - BaseCPU::post_interrupt(int_num, index); + BaseCPU::postInterrupt(int_num, index); if (_status == Idle) { DPRINTF(IPI,"Suspended Processor awoke\n"); diff --git a/src/cpu/ozone/inorder_back_end_impl.hh b/src/cpu/ozone/inorder_back_end_impl.hh index cf8634a42..798b628d6 100644 --- a/src/cpu/ozone/inorder_back_end_impl.hh +++ b/src/cpu/ozone/inorder_back_end_impl.hh @@ -149,8 +149,7 @@ InorderBackEnd<Impl>::tick() // if (interrupt) then set thread PC, stall front end, record that // I'm waiting for it to drain. (for now just squash) #if FULL_SYSTEM - if (interruptBlocked || - cpu->check_interrupts(tc)) { + if (interruptBlocked || cpu->checkInterrupts(tc)) { if (!robEmpty()) { interruptBlocked = true; //AlphaDep diff --git a/src/cpu/ozone/lw_back_end_impl.hh b/src/cpu/ozone/lw_back_end_impl.hh index a5d79a789..60c42edd3 100644 --- a/src/cpu/ozone/lw_back_end_impl.hh +++ b/src/cpu/ozone/lw_back_end_impl.hh @@ -525,10 +525,7 @@ template <class Impl> void LWBackEnd<Impl>::checkInterrupts() { - if (cpu->checkInterrupts && - cpu->check_interrupts(tc) && - !trapSquash && - !tcSquash) { + if (cpu->checkInterrupts(tc) && !trapSquash && !tcSquash) { frontEnd->interruptPending = true; if (robEmpty() && !LSQ.hasStoresToWB()) { // Will need to squash all instructions currently in flight and have diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc index d207bda14..b3379cddb 100644 --- a/src/cpu/simple/base.cc +++ b/src/cpu/simple/base.cc @@ -303,9 +303,9 @@ BaseSimpleCPU::dbg_vtophys(Addr addr) #if FULL_SYSTEM void -BaseSimpleCPU::post_interrupt(int int_num, int index) +BaseSimpleCPU::postInterrupt(int int_num, int index) { - BaseCPU::post_interrupt(int_num, index); + BaseCPU::postInterrupt(int_num, index); if (thread->status() == ThreadContext::Suspended) { DPRINTF(Quiesce,"Suspended Processor awoke\n"); @@ -318,7 +318,7 @@ void BaseSimpleCPU::checkForInterrupts() { #if FULL_SYSTEM - if (check_interrupts(tc)) { + if (checkInterrupts(tc)) { Fault interrupt = interrupts->getInterrupt(tc); if (interrupt != NoFault) { diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh index b7fcf1708..dc736c22e 100644 --- a/src/cpu/simple/base.hh +++ b/src/cpu/simple/base.hh @@ -98,7 +98,7 @@ class BaseSimpleCPU : public BaseCPU } public: - void post_interrupt(int int_num, int index); + void postInterrupt(int int_num, int index); void zero_fill_64(Addr addr) { static int warned = 0; diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc index 42da659f2..68683e568 100644 --- a/src/cpu/simple_thread.cc +++ b/src/cpu/simple_thread.cc @@ -241,7 +241,7 @@ SimpleThread::suspend() /* #if FULL_SYSTEM // Don't change the status from active if there are pending interrupts - if (cpu->check_interrupts()) { + if (cpu->checkInterrupts()) { assert(status() == ThreadContext::Active); return; } |