summaryrefslogtreecommitdiff
path: root/src/cpu
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/SConscript5
-rw-r--r--src/cpu/intr_control.cc8
2 files changed, 10 insertions, 3 deletions
diff --git a/src/cpu/SConscript b/src/cpu/SConscript
index a1074cb8b..370b83909 100644
--- a/src/cpu/SConscript
+++ b/src/cpu/SConscript
@@ -109,6 +109,7 @@ SimObject('BaseCPU.py')
SimObject('FuncUnit.py')
SimObject('ExeTracer.py')
SimObject('IntelTrace.py')
+SimObject('IntrControl.py')
SimObject('NativeTrace.py')
Source('activity.cc')
@@ -118,6 +119,7 @@ Source('decode.cc')
Source('exetrace.cc')
Source('func_unit.cc')
Source('inteltrace.cc')
+Source('intr_control.cc')
Source('nativetrace.cc')
Source('pc_event.cc')
Source('quiesce_event.cc')
@@ -127,9 +129,6 @@ Source('thread_context.cc')
Source('thread_state.cc')
if env['FULL_SYSTEM']:
- SimObject('IntrControl.py')
-
- Source('intr_control.cc')
Source('profile.cc')
if env['TARGET_ISA'] == 'sparc':
diff --git a/src/cpu/intr_control.cc b/src/cpu/intr_control.cc
index 8f3808889..62be4ea19 100644
--- a/src/cpu/intr_control.cc
+++ b/src/cpu/intr_control.cc
@@ -48,19 +48,27 @@ IntrControl::IntrControl(const Params *p)
void
IntrControl::post(int cpu_id, int int_num, int index)
{
+#if FULL_SYSTEM
DPRINTF(IntrControl, "post %d:%d (cpu %d)\n", int_num, index, cpu_id);
std::vector<ThreadContext *> &tcvec = sys->threadContexts;
BaseCPU *cpu = tcvec[cpu_id]->getCpuPtr();
cpu->postInterrupt(int_num, index);
+#else
+ panic("Called IntrControl::post in SE mode.\n");
+#endif
}
void
IntrControl::clear(int cpu_id, int int_num, int index)
{
+#if FULL_SYSTEM
DPRINTF(IntrControl, "clear %d:%d (cpu %d)\n", int_num, index, cpu_id);
std::vector<ThreadContext *> &tcvec = sys->threadContexts;
BaseCPU *cpu = tcvec[cpu_id]->getCpuPtr();
cpu->clearInterrupt(int_num, index);
+#else
+ panic("Called IntrControl::clear in SE mode.\n");
+#endif
}
IntrControl *