diff options
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/inorder/resources/cache_unit.cc | 10 | ||||
-rw-r--r-- | src/cpu/inorder/resources/cache_unit.hh | 4 |
2 files changed, 7 insertions, 7 deletions
diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc index 83eb617aa..c627466a1 100644 --- a/src/cpu/inorder/resources/cache_unit.cc +++ b/src/cpu/inorder/resources/cache_unit.cc @@ -240,17 +240,17 @@ CacheUnit::removeAddrDependency(DynInstPtr inst) inst->unsetMemAddr(); // Erase from Address List - vector<Addr>::iterator vect_it = find(addrList[tid].begin(), + std::list<Addr>::iterator list_it = find(addrList[tid].begin(), addrList[tid].end(), mem_addr); - assert(vect_it != addrList[tid].end() || inst->splitInst); + assert(list_it != addrList[tid].end() || inst->splitInst); - if (vect_it != addrList[tid].end()) { + if (list_it != addrList[tid].end()) { DPRINTF(AddrDep, "[tid:%i]: [sn:%i] Address %08p removed from dependency " - "list\n", inst->readTid(), inst->seqNum, (*vect_it)); + "list\n", inst->readTid(), inst->seqNum, (*list_it)); - addrList[tid].erase(vect_it); + addrList[tid].erase(list_it); // Erase From Address Map (Used for Debugging) addrMap[tid].erase(addrMap[tid].find(mem_addr)); diff --git a/src/cpu/inorder/resources/cache_unit.hh b/src/cpu/inorder/resources/cache_unit.hh index 7daf5f4a0..dd6fa7638 100644 --- a/src/cpu/inorder/resources/cache_unit.hh +++ b/src/cpu/inorder/resources/cache_unit.hh @@ -187,9 +187,9 @@ class CacheUnit : public Resource bool cachePortBlocked; - std::vector<Addr> addrList[ThePipeline::MaxThreads]; + std::list<Addr> addrList[ThePipeline::MaxThreads]; - std::map<Addr, InstSeqNum> addrMap[ThePipeline::MaxThreads]; + m5::hash_map<Addr, InstSeqNum> addrMap[ThePipeline::MaxThreads]; public: int cacheBlkSize; |