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-rw-r--r--src/cpu/base.cc18
-rw-r--r--src/cpu/base.hh9
-rw-r--r--src/cpu/checker/cpu.cc4
-rw-r--r--src/cpu/checker/cpu.hh4
-rw-r--r--src/cpu/checker/thread_context.hh4
-rw-r--r--src/cpu/kvm/BaseKvmCPU.py2
-rw-r--r--src/cpu/kvm/base.cc11
-rw-r--r--src/cpu/kvm/base.hh9
-rw-r--r--src/cpu/kvm/x86_cpu.cc2
-rw-r--r--src/cpu/kvm/x86_cpu.hh2
-rw-r--r--src/cpu/minor/cpu.cc21
-rw-r--r--src/cpu/minor/cpu.hh10
-rw-r--r--src/cpu/o3/cpu.cc9
-rw-r--r--src/cpu/o3/cpu.hh7
-rw-r--r--src/cpu/o3/thread_state.hh12
-rw-r--r--src/cpu/simple/base.cc9
-rw-r--r--src/cpu/simple/base.hh6
-rw-r--r--src/cpu/simple_thread.cc12
-rw-r--r--src/cpu/simple_thread.hh4
-rw-r--r--src/cpu/testers/traffic_gen/traffic_gen.cc4
-rw-r--r--src/cpu/testers/traffic_gen/traffic_gen.hh5
-rw-r--r--src/cpu/thread_context.cc12
-rw-r--r--src/cpu/thread_context.hh4
-rw-r--r--src/cpu/thread_state.cc8
-rw-r--r--src/cpu/thread_state.hh6
25 files changed, 93 insertions, 101 deletions
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 4d8b09ed2..0b704c48b 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -640,7 +640,7 @@ BaseCPU::ProfileEvent::process()
}
void
-BaseCPU::serialize(std::ostream &os)
+BaseCPU::serialize(CheckpointOut &cp) const
{
SERIALIZE_SCALAR(instCnt);
@@ -651,28 +651,30 @@ BaseCPU::serialize(std::ostream &os)
* system. */
SERIALIZE_SCALAR(_pid);
- interrupts->serialize(os);
+ interrupts->serialize(cp);
// Serialize the threads, this is done by the CPU implementation.
for (ThreadID i = 0; i < numThreads; ++i) {
- nameOut(os, csprintf("%s.xc.%i", name(), i));
- serializeThread(os, i);
+ ScopedCheckpointSection sec(cp, csprintf("xc.%i", i));
+ serializeThread(cp, i);
}
}
}
void
-BaseCPU::unserialize(Checkpoint *cp, const std::string &section)
+BaseCPU::unserialize(CheckpointIn &cp)
{
UNSERIALIZE_SCALAR(instCnt);
if (!_switchedOut) {
UNSERIALIZE_SCALAR(_pid);
- interrupts->unserialize(cp, section);
+ interrupts->unserialize(cp);
// Unserialize the threads, this is done by the CPU implementation.
- for (ThreadID i = 0; i < numThreads; ++i)
- unserializeThread(cp, csprintf("%s.xc.%i", section, i), i);
+ for (ThreadID i = 0; i < numThreads; ++i) {
+ ScopedCheckpointSection sec(cp, csprintf("xc.%i", i));
+ unserializeThread(cp, i);
+ }
}
}
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index 662b24a99..660f0278e 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -390,7 +390,7 @@ class BaseCPU : public MemObject
*
* @param os The stream to serialize to.
*/
- virtual void serialize(std::ostream &os);
+ void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
/**
* Reconstruct the state of this object from a checkpoint.
@@ -403,7 +403,7 @@ class BaseCPU : public MemObject
* @param cp The checkpoint use.
* @param section The section name of this object.
*/
- virtual void unserialize(Checkpoint *cp, const std::string &section);
+ void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
/**
* Serialize a single thread.
@@ -411,7 +411,7 @@ class BaseCPU : public MemObject
* @param os The stream to serialize to.
* @param tid ID of the current thread.
*/
- virtual void serializeThread(std::ostream &os, ThreadID tid) {};
+ virtual void serializeThread(CheckpointOut &cp, ThreadID tid) const {};
/**
* Unserialize one thread.
@@ -420,8 +420,7 @@ class BaseCPU : public MemObject
* @param section The section name of this thread.
* @param tid ID of the current thread.
*/
- virtual void unserializeThread(Checkpoint *cp, const std::string &section,
- ThreadID tid) {};
+ virtual void unserializeThread(CheckpointIn &cp, ThreadID tid) {};
virtual Counter totalInsts() const = 0;
diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc
index 229066fcc..ac476e5f4 100644
--- a/src/cpu/checker/cpu.cc
+++ b/src/cpu/checker/cpu.cc
@@ -129,12 +129,12 @@ CheckerCPU::setDcachePort(MasterPort *dcache_port)
}
void
-CheckerCPU::serialize(ostream &os)
+CheckerCPU::serialize(ostream &os) const
{
}
void
-CheckerCPU::unserialize(Checkpoint *cp, const string &section)
+CheckerCPU::unserialize(CheckpointIn &cp)
{
}
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index bed3b9e32..a363b6d0f 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -189,8 +189,8 @@ class CheckerCPU : public BaseCPU, public ExecContext
Counter numLoad;
Counter startNumLoad;
- virtual void serialize(std::ostream &os);
- virtual void unserialize(Checkpoint *cp, const std::string &section);
+ void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+ void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
// These functions are only used in CPU models that split
// effective address computation from the actual memory access.
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index 26d0dfa8b..71c231ba0 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -180,10 +180,6 @@ class CheckerThreadContext : public ThreadContext
checkerTC->regStats(name);
}
- void serialize(std::ostream &os) { actualTC->serialize(os); }
- void unserialize(Checkpoint *cp, const std::string &section)
- { actualTC->unserialize(cp, section); }
-
EndQuiesceEvent *getQuiesceEvent() { return actualTC->getQuiesceEvent(); }
Tick readLastActivate() { return actualTC->readLastActivate(); }
diff --git a/src/cpu/kvm/BaseKvmCPU.py b/src/cpu/kvm/BaseKvmCPU.py
index 644ca3620..b7c964669 100644
--- a/src/cpu/kvm/BaseKvmCPU.py
+++ b/src/cpu/kvm/BaseKvmCPU.py
@@ -53,7 +53,7 @@ class BaseKvmCPU(BaseCPU):
@classmethod
def export_methods(cls, code):
code('''
- void dump();
+ void dump() const;
''')
@classmethod
diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc
index 827cd5581..30e984366 100644
--- a/src/cpu/kvm/base.cc
+++ b/src/cpu/kvm/base.cc
@@ -259,7 +259,7 @@ BaseKvmCPU::regStats()
}
void
-BaseKvmCPU::serializeThread(std::ostream &os, ThreadID tid)
+BaseKvmCPU::serializeThread(CheckpointOut &cp, ThreadID tid) const
{
if (DTRACE(Checkpoint)) {
DPRINTF(Checkpoint, "KVM: Serializing thread %i:\n", tid);
@@ -268,18 +268,17 @@ BaseKvmCPU::serializeThread(std::ostream &os, ThreadID tid)
assert(tid == 0);
assert(_status == Idle);
- thread->serialize(os);
+ thread->serialize(cp);
}
void
-BaseKvmCPU::unserializeThread(Checkpoint *cp, const std::string &section,
- ThreadID tid)
+BaseKvmCPU::unserializeThread(CheckpointIn &cp, ThreadID tid)
{
DPRINTF(Checkpoint, "KVM: Unserialize thread %i:\n", tid);
assert(tid == 0);
assert(_status == Idle);
- thread->unserialize(cp, section);
+ thread->unserialize(cp);
threadContextDirty = true;
}
@@ -511,7 +510,7 @@ BaseKvmCPU::totalOps() const
}
void
-BaseKvmCPU::dump()
+BaseKvmCPU::dump() const
{
inform("State dumping not implemented.");
}
diff --git a/src/cpu/kvm/base.hh b/src/cpu/kvm/base.hh
index ce32cdbb1..a8e429dfa 100644
--- a/src/cpu/kvm/base.hh
+++ b/src/cpu/kvm/base.hh
@@ -84,9 +84,10 @@ class BaseKvmCPU : public BaseCPU
void startup();
void regStats();
- void serializeThread(std::ostream &os, ThreadID tid);
- void unserializeThread(Checkpoint *cp, const std::string &section,
- ThreadID tid);
+ void serializeThread(CheckpointOut &cp,
+ ThreadID tid) const M5_ATTR_OVERRIDE;
+ void unserializeThread(CheckpointIn &cp,
+ ThreadID tid) M5_ATTR_OVERRIDE;
unsigned int drain(DrainManager *dm);
void drainResume();
@@ -111,7 +112,7 @@ class BaseKvmCPU : public BaseCPU
Counter totalOps() const;
/** Dump the internal state to the terminal. */
- virtual void dump();
+ virtual void dump() const;
/**
* Force an exit from KVM.
diff --git a/src/cpu/kvm/x86_cpu.cc b/src/cpu/kvm/x86_cpu.cc
index 34b51f137..cd46370a4 100644
--- a/src/cpu/kvm/x86_cpu.cc
+++ b/src/cpu/kvm/x86_cpu.cc
@@ -562,7 +562,7 @@ X86KvmCPU::startup()
}
void
-X86KvmCPU::dump()
+X86KvmCPU::dump() const
{
dumpIntRegs();
if (useXSave)
diff --git a/src/cpu/kvm/x86_cpu.hh b/src/cpu/kvm/x86_cpu.hh
index 18471040c..2e93a5f26 100644
--- a/src/cpu/kvm/x86_cpu.hh
+++ b/src/cpu/kvm/x86_cpu.hh
@@ -47,7 +47,7 @@ class X86KvmCPU : public BaseKvmCPU
void startup();
/** @{ */
- void dump();
+ void dump() const M5_ATTR_OVERRIDE;
void dumpFpuRegs() const;
void dumpIntRegs() const;
void dumpSpecRegs() const;
diff --git a/src/cpu/minor/cpu.cc b/src/cpu/minor/cpu.cc
index 45817c3a8..d21bf7042 100644
--- a/src/cpu/minor/cpu.cc
+++ b/src/cpu/minor/cpu.cc
@@ -130,33 +130,32 @@ MinorCPU::regStats()
}
void
-MinorCPU::serializeThread(std::ostream &os, ThreadID thread_id)
+MinorCPU::serializeThread(CheckpointOut &cp, ThreadID thread_id) const
{
- threads[thread_id]->serialize(os);
+ threads[thread_id]->serialize(cp);
}
void
-MinorCPU::unserializeThread(Checkpoint *cp, const std::string &section,
- ThreadID thread_id)
+MinorCPU::unserializeThread(CheckpointIn &cp, ThreadID thread_id)
{
if (thread_id != 0)
fatal("Trying to load more than one thread into a MinorCPU\n");
- threads[thread_id]->unserialize(cp, section);
+ threads[thread_id]->unserialize(cp);
}
void
-MinorCPU::serialize(std::ostream &os)
+MinorCPU::serialize(CheckpointOut &cp) const
{
- pipeline->serialize(os);
- BaseCPU::serialize(os);
+ pipeline->serialize(cp);
+ BaseCPU::serialize(cp);
}
void
-MinorCPU::unserialize(Checkpoint *cp, const std::string &section)
+MinorCPU::unserialize(CheckpointIn &cp)
{
- pipeline->unserialize(cp, section);
- BaseCPU::unserialize(cp, section);
+ pipeline->unserialize(cp);
+ BaseCPU::unserialize(cp);
}
Addr
diff --git a/src/cpu/minor/cpu.hh b/src/cpu/minor/cpu.hh
index 507261fbd..fba54b515 100644
--- a/src/cpu/minor/cpu.hh
+++ b/src/cpu/minor/cpu.hh
@@ -146,13 +146,13 @@ class MinorCPU : public BaseCPU
Counter totalInsts() const;
Counter totalOps() const;
- void serializeThread(std::ostream &os, ThreadID thread_id);
- void unserializeThread(Checkpoint *cp, const std::string &section,
- ThreadID thread_id);
+ void serializeThread(CheckpointOut &cp,
+ ThreadID tid) const M5_ATTR_OVERRIDE;
+ void unserializeThread(CheckpointIn &cp, ThreadID tid) M5_ATTR_OVERRIDE;
/** Serialize pipeline data */
- void serialize(std::ostream &os);
- void unserialize(Checkpoint *cp, const std::string &section);
+ void serialize(CheckpointOut &cp) const;
+ void unserialize(CheckpointIn &cp);
/** Drain interface */
unsigned int drain(DrainManager *drain_manager);
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 34ef275a7..18e958278 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -986,17 +986,16 @@ FullO3CPU<Impl>::syscall(int64_t callnum, ThreadID tid)
template <class Impl>
void
-FullO3CPU<Impl>::serializeThread(std::ostream &os, ThreadID tid)
+FullO3CPU<Impl>::serializeThread(CheckpointOut &cp, ThreadID tid) const
{
- thread[tid]->serialize(os);
+ thread[tid]->serialize(cp);
}
template <class Impl>
void
-FullO3CPU<Impl>::unserializeThread(Checkpoint *cp, const std::string &section,
- ThreadID tid)
+FullO3CPU<Impl>::unserializeThread(CheckpointIn &cp, ThreadID tid)
{
- thread[tid]->unserialize(cp, section);
+ thread[tid]->unserialize(cp);
}
template <class Impl>
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index c4ccd562b..bbc9fde8e 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -338,10 +338,9 @@ class FullO3CPU : public BaseO3CPU
/** Is the CPU draining? */
bool isDraining() const { return getDrainState() == Drainable::Draining; }
- void serializeThread(std::ostream &os, ThreadID tid);
-
- void unserializeThread(Checkpoint *cp, const std::string &section,
- ThreadID tid);
+ void serializeThread(CheckpointOut &cp,
+ ThreadID tid) const M5_ATTR_OVERRIDE;
+ void unserializeThread(CheckpointIn &cp, ThreadID tid) M5_ATTR_OVERRIDE;
public:
/** Executes a syscall.
diff --git a/src/cpu/o3/thread_state.hh b/src/cpu/o3/thread_state.hh
index eea7a3d16..cf9403e48 100644
--- a/src/cpu/o3/thread_state.hh
+++ b/src/cpu/o3/thread_state.hh
@@ -112,24 +112,24 @@ struct O3ThreadState : public ThreadState {
profilePC = 3;
}
- void serialize(std::ostream &os)
+ void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE
{
- ThreadState::serialize(os);
+ ThreadState::serialize(cp);
// Use the ThreadContext serialization helper to serialize the
// TC.
- ::serialize(*tc, os);
+ ::serialize(*tc, cp);
}
- void unserialize(Checkpoint *cp, const std::string &section)
+ void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE
{
// Prevent squashing - we don't have any instructions in
// flight that we need to squash since we just instantiated a
// clean system.
noSquashFromTC = true;
- ThreadState::unserialize(cp, section);
+ ThreadState::unserialize(cp);
// Use the ThreadContext serialization helper to unserialize
// the TC.
- ::unserialize(*tc, cp, section);
+ ::unserialize(*tc, cp);
noSquashFromTC = false;
}
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 9cfbd5f93..2751a346c 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -305,21 +305,20 @@ BaseSimpleCPU::resetStats()
}
void
-BaseSimpleCPU::serializeThread(ostream &os, ThreadID tid)
+BaseSimpleCPU::serializeThread(CheckpointOut &cp, ThreadID tid) const
{
assert(_status == Idle || _status == Running);
assert(tid == 0);
- thread->serialize(os);
+ thread->serialize(cp);
}
void
-BaseSimpleCPU::unserializeThread(Checkpoint *cp, const string &section,
- ThreadID tid)
+BaseSimpleCPU::unserializeThread(CheckpointIn &cp, ThreadID tid)
{
if (tid != 0)
fatal("Trying to load more than one thread into a SimpleCPU\n");
- thread->unserialize(cp, section);
+ thread->unserialize(cp);
}
void
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 6e8b4a8c8..2f7247010 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -278,9 +278,9 @@ class BaseSimpleCPU : public BaseCPU, public ExecContext
// instruction mix histogram by OpClass
Stats::Vector statExecutedInstType;
- void serializeThread(std::ostream &os, ThreadID tid);
- void unserializeThread(Checkpoint *cp, const std::string &section,
- ThreadID tid);
+ void serializeThread(CheckpointOut &cp,
+ ThreadID tid) const M5_ATTR_OVERRIDE;
+ void unserializeThread(CheckpointIn &cp, ThreadID tid) M5_ATTR_OVERRIDE;
// These functions are only used in CPU models that split
// effective address computation from the actual memory access.
diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc
index 36603a1c1..5e457f692 100644
--- a/src/cpu/simple_thread.cc
+++ b/src/cpu/simple_thread.cc
@@ -131,18 +131,18 @@ SimpleThread::copyState(ThreadContext *oldContext)
}
void
-SimpleThread::serialize(ostream &os)
+SimpleThread::serialize(CheckpointOut &cp) const
{
- ThreadState::serialize(os);
- ::serialize(*tc, os);
+ ThreadState::serialize(cp);
+ ::serialize(*tc, cp);
}
void
-SimpleThread::unserialize(Checkpoint *cp, const std::string &section)
+SimpleThread::unserialize(CheckpointIn &cp)
{
- ThreadState::unserialize(cp, section);
- ::unserialize(*tc, cp, section);
+ ThreadState::unserialize(cp);
+ ::unserialize(*tc, cp);
}
void
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index e862385c5..20acff6ee 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -154,8 +154,8 @@ class SimpleThread : public ThreadState
void copyState(ThreadContext *oldContext);
- void serialize(std::ostream &os);
- void unserialize(Checkpoint *cp, const std::string &section);
+ void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+ void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
void startup();
/***************************************************************
diff --git a/src/cpu/testers/traffic_gen/traffic_gen.cc b/src/cpu/testers/traffic_gen/traffic_gen.cc
index 9f3192656..0fc8848fb 100644
--- a/src/cpu/testers/traffic_gen/traffic_gen.cc
+++ b/src/cpu/testers/traffic_gen/traffic_gen.cc
@@ -139,7 +139,7 @@ TrafficGen::drain(DrainManager *dm)
}
void
-TrafficGen::serialize(ostream &os)
+TrafficGen::serialize(CheckpointOut &cp) const
{
DPRINTF(Checkpoint, "Serializing TrafficGen\n");
@@ -158,7 +158,7 @@ TrafficGen::serialize(ostream &os)
}
void
-TrafficGen::unserialize(Checkpoint* cp, const string& section)
+TrafficGen::unserialize(CheckpointIn &cp)
{
// restore scheduled events
Tick nextEvent;
diff --git a/src/cpu/testers/traffic_gen/traffic_gen.hh b/src/cpu/testers/traffic_gen/traffic_gen.hh
index eb9f6541d..ba7fda7dd 100644
--- a/src/cpu/testers/traffic_gen/traffic_gen.hh
+++ b/src/cpu/testers/traffic_gen/traffic_gen.hh
@@ -203,9 +203,8 @@ class TrafficGen : public MemObject
unsigned int drain(DrainManager *dm);
- void serialize(std::ostream &os);
-
- void unserialize(Checkpoint* cp, const std::string& section);
+ void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+ void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
/** Register statistics */
void regStats();
diff --git a/src/cpu/thread_context.cc b/src/cpu/thread_context.cc
index 09f91746a..fe1ae69dd 100644
--- a/src/cpu/thread_context.cc
+++ b/src/cpu/thread_context.cc
@@ -104,7 +104,7 @@ ThreadContext::compare(ThreadContext *one, ThreadContext *two)
}
void
-serialize(ThreadContext &tc, std::ostream &os)
+serialize(ThreadContext &tc, CheckpointOut &cp)
{
using namespace TheISA;
@@ -113,7 +113,7 @@ serialize(ThreadContext &tc, std::ostream &os)
floatRegs[i] = tc.readFloatRegBitsFlat(i);
// This is a bit ugly, but needed to maintain backwards
// compatibility.
- arrayParamOut(os, "floatRegs.i", floatRegs, NumFloatRegs);
+ arrayParamOut(cp, "floatRegs.i", floatRegs, NumFloatRegs);
IntReg intRegs[NumIntRegs];
for (int i = 0; i < NumIntRegs; ++i)
@@ -127,20 +127,20 @@ serialize(ThreadContext &tc, std::ostream &os)
SERIALIZE_ARRAY(ccRegs, NumCCRegs);
#endif
- tc.pcState().serialize(os);
+ tc.pcState().serialize(cp);
// thread_num and cpu_id are deterministic from the config
}
void
-unserialize(ThreadContext &tc, Checkpoint *cp, const std::string &section)
+unserialize(ThreadContext &tc, CheckpointIn &cp)
{
using namespace TheISA;
FloatRegBits floatRegs[NumFloatRegs];
// This is a bit ugly, but needed to maintain backwards
// compatibility.
- arrayParamIn(cp, section, "floatRegs.i", floatRegs, NumFloatRegs);
+ arrayParamIn(cp, "floatRegs.i", floatRegs, NumFloatRegs);
for (int i = 0; i < NumFloatRegs; ++i)
tc.setFloatRegBitsFlat(i, floatRegs[i]);
@@ -157,7 +157,7 @@ unserialize(ThreadContext &tc, Checkpoint *cp, const std::string &section)
#endif
PCState pcState;
- pcState.unserialize(cp, section);
+ pcState.unserialize(cp);
tc.pcState(pcState);
// thread_num and cpu_id are deterministic from the config
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 966924c50..2544b19c6 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -499,8 +499,8 @@ class ProxyThreadContext : public ThreadContext
* be confusing when the ThreadContext is exported via a proxy.
*/
-void serialize(ThreadContext &tc, std::ostream &os);
-void unserialize(ThreadContext &tc, Checkpoint *cp, const std::string &section);
+void serialize(ThreadContext &tc, CheckpointOut &cp);
+void unserialize(ThreadContext &tc, CheckpointIn &cp);
/** @} */
diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc
index 0e1e6c57e..424187613 100644
--- a/src/cpu/thread_state.cc
+++ b/src/cpu/thread_state.cc
@@ -63,7 +63,7 @@ ThreadState::~ThreadState()
}
void
-ThreadState::serialize(std::ostream &os)
+ThreadState::serialize(CheckpointOut &cp) const
{
SERIALIZE_ENUM(_status);
// thread_num and cpu_id are deterministic from the config
@@ -77,11 +77,11 @@ ThreadState::serialize(std::ostream &os)
quiesceEndTick = quiesceEvent->when();
SERIALIZE_SCALAR(quiesceEndTick);
if (kernelStats)
- kernelStats->serialize(os);
+ kernelStats->serialize(cp);
}
void
-ThreadState::unserialize(Checkpoint *cp, const std::string &section)
+ThreadState::unserialize(CheckpointIn &cp)
{
UNSERIALIZE_ENUM(_status);
@@ -96,7 +96,7 @@ ThreadState::unserialize(Checkpoint *cp, const std::string &section)
if (quiesceEndTick)
baseCpu->schedule(quiesceEvent, quiesceEndTick);
if (kernelStats)
- kernelStats->unserialize(cp, section);
+ kernelStats->unserialize(cp);
}
void
diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh
index f937964ff..485c9306f 100644
--- a/src/cpu/thread_state.hh
+++ b/src/cpu/thread_state.hh
@@ -56,16 +56,16 @@ class Checkpoint;
* memory, quiesce events, and certain stats. This can be expanded
* to hold more thread-specific stats within it.
*/
-struct ThreadState {
+struct ThreadState : public Serializable {
typedef ThreadContext::Status Status;
ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process);
virtual ~ThreadState();
- void serialize(std::ostream &os);
+ void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
- void unserialize(Checkpoint *cp, const std::string &section);
+ void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
int cpuId() const { return baseCpu->cpuId(); }
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-08 02:20:37 +0000