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-rw-r--r--src/cpu/simple/atomic.cc4
-rw-r--r--src/cpu/simple/base.hh11
-rw-r--r--src/cpu/simple/timing.cc4
-rw-r--r--src/cpu/simple_thread.cc2
-rw-r--r--src/cpu/simple_thread.hh10
-rw-r--r--src/cpu/thread_context.hh17
6 files changed, 27 insertions, 21 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 11e4d2acb..1e12aadef 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -513,8 +513,8 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AtomicSimpleCPU)
Param<int> cpu_id;
#if FULL_SYSTEM
- SimObjectParam<AlphaITB *> itb;
- SimObjectParam<AlphaDTB *> dtb;
+ SimObjectParam<TheISA::ITB *> itb;
+ SimObjectParam<TheISA::DTB *> dtb;
Param<Tick> profile;
#else
SimObjectParam<Process *> workload;
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index af6b6f835..1a9fc5127 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -47,8 +47,11 @@
// forward declarations
#if FULL_SYSTEM
class Processor;
-class AlphaITB;
-class AlphaDTB;
+namespace TheISA
+{
+ class ITB;
+ class DTB;
+}
class MemObject;
class RemoteGDB;
@@ -97,8 +100,8 @@ class BaseSimpleCPU : public BaseCPU
{
MemObject *mem;
#if FULL_SYSTEM
- AlphaITB *itb;
- AlphaDTB *dtb;
+ TheISA::ITB *itb;
+ TheISA::DTB *dtb;
#else
Process *process;
#endif
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index fe6775ea4..438417882 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -665,8 +665,8 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(TimingSimpleCPU)
Param<int> cpu_id;
#if FULL_SYSTEM
- SimObjectParam<AlphaITB *> itb;
- SimObjectParam<AlphaDTB *> dtb;
+ SimObjectParam<TheISA::ITB *> itb;
+ SimObjectParam<TheISA::DTB *> dtb;
Param<Tick> profile;
#else
SimObjectParam<Process *> workload;
diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc
index 4fc47c982..95018ff8c 100644
--- a/src/cpu/simple_thread.cc
+++ b/src/cpu/simple_thread.cc
@@ -60,7 +60,7 @@ using namespace std;
// constructor
#if FULL_SYSTEM
SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
- AlphaITB *_itb, AlphaDTB *_dtb,
+ TheISA::ITB *_itb, TheISA::DTB *_dtb,
bool use_kernel_stats)
: ThreadState(-1, _thread_num), cpu(_cpu), system(_sys), itb(_itb),
dtb(_dtb)
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index fe22e6c43..10ec8faaa 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -107,14 +107,14 @@ class SimpleThread : public ThreadState
System *system;
#if FULL_SYSTEM
- AlphaITB *itb;
- AlphaDTB *dtb;
+ TheISA::ITB *itb;
+ TheISA::DTB *dtb;
#endif
// constructor: initialize SimpleThread from given process structure
#if FULL_SYSTEM
SimpleThread(BaseCPU *_cpu, int _thread_num, System *_system,
- AlphaITB *_itb, AlphaDTB *_dtb,
+ TheISA::ITB *_itb, TheISA::DTB *_dtb,
bool use_kernel_stats = true);
#else
SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process, int _asid,
@@ -201,9 +201,9 @@ class SimpleThread : public ThreadState
#if FULL_SYSTEM
System *getSystemPtr() { return system; }
- AlphaITB *getITBPtr() { return itb; }
+ TheISA::ITB *getITBPtr() { return itb; }
- AlphaDTB *getDTBPtr() { return dtb; }
+ TheISA::DTB *getDTBPtr() { return dtb; }
FunctionalPort *getPhysPort() { return physPort; }
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 73046097d..448d67d02 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -31,9 +31,9 @@
#ifndef __CPU_THREAD_CONTEXT_HH__
#define __CPU_THREAD_CONTEXT_HH__
-#include "arch/types.hh"
#include "arch/regfile.hh"
#include "arch/syscallreturn.hh"
+#include "arch/types.hh"
#include "config/full_system.hh"
#include "mem/request.hh"
#include "sim/faults.hh"
@@ -43,8 +43,11 @@
// @todo: Figure out a more architecture independent way to obtain the ITB and
// DTB pointers.
-class AlphaDTB;
-class AlphaITB;
+namespace TheISA
+{
+ class DTB;
+ class ITB;
+}
class BaseCPU;
class EndQuiesceEvent;
class Event;
@@ -117,9 +120,9 @@ class ThreadContext
#if FULL_SYSTEM
virtual System *getSystemPtr() = 0;
- virtual AlphaITB *getITBPtr() = 0;
+ virtual TheISA::ITB *getITBPtr() = 0;
- virtual AlphaDTB * getDTBPtr() = 0;
+ virtual TheISA::DTB *getDTBPtr() = 0;
virtual Kernel::Statistics *getKernelStats() = 0;
@@ -292,9 +295,9 @@ class ProxyThreadContext : public ThreadContext
#if FULL_SYSTEM
System *getSystemPtr() { return actualTC->getSystemPtr(); }
- AlphaITB *getITBPtr() { return actualTC->getITBPtr(); }
+ TheISA::ITB *getITBPtr() { return actualTC->getITBPtr(); }
- AlphaDTB *getDTBPtr() { return actualTC->getDTBPtr(); }
+ TheISA::DTB *getDTBPtr() { return actualTC->getDTBPtr(); }
Kernel::Statistics *getKernelStats() { return actualTC->getKernelStats(); }