diff options
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/checker/cpu.hh | 2 | ||||
-rw-r--r-- | src/cpu/exec_context.hh | 4 | ||||
-rw-r--r-- | src/cpu/o3/alpha/cpu.hh | 4 | ||||
-rw-r--r-- | src/cpu/o3/alpha/cpu_impl.hh | 14 | ||||
-rw-r--r-- | src/cpu/o3/alpha/dyn_inst_impl.hh | 14 | ||||
-rw-r--r-- | src/cpu/o3/regfile.hh | 6 | ||||
-rw-r--r-- | src/cpu/ozone/cpu.hh | 2 | ||||
-rw-r--r-- | src/cpu/ozone/dyn_inst.hh | 2 | ||||
-rw-r--r-- | src/cpu/ozone/dyn_inst_impl.hh | 14 | ||||
-rw-r--r-- | src/cpu/simple/base.hh | 2 | ||||
-rw-r--r-- | src/cpu/simple_thread.hh | 2 |
11 files changed, 0 insertions, 66 deletions
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh index 00b01171f..7c01bdc39 100644 --- a/src/cpu/checker/cpu.hh +++ b/src/cpu/checker/cpu.hh @@ -328,8 +328,6 @@ class CheckerCPU : public BaseCPU #if FULL_SYSTEM Fault hwrei() { return thread->hwrei(); } - int readIntrFlag() { return thread->readIntrFlag(); } - void setIntrFlag(int val) { thread->setIntrFlag(val); } bool inPalMode() { return thread->inPalMode(); } void ev5_trap(Fault fault) { fault->invoke(tc); } bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); } diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh index f6e8d7c25..e28b33193 100644 --- a/src/cpu/exec_context.hh +++ b/src/cpu/exec_context.hh @@ -144,10 +144,6 @@ class ExecContext { /** Somewhat Alpha-specific function that handles returning from * an error or interrupt. */ Fault hwrei(); - /** Reads the interrupt flags. */ - int readIntrFlag(); - /** Sets the interrupt flags to a value. */ - void setIntrFlag(int val); /** * Check for special simulator handling of specific PAL calls. If diff --git a/src/cpu/o3/alpha/cpu.hh b/src/cpu/o3/alpha/cpu.hh index 9d97f9701..474fce02a 100644 --- a/src/cpu/o3/alpha/cpu.hh +++ b/src/cpu/o3/alpha/cpu.hh @@ -145,10 +145,6 @@ class AlphaO3CPU : public FullO3CPU<Impl> #if FULL_SYSTEM /** Posts an interrupt. */ void post_interrupt(int int_num, int index); - /** Reads the interrupt flag. */ - int readIntrFlag(); - /** Sets the interrupt flags. */ - void setIntrFlag(int val); /** HW return from error interrupt. */ Fault hwrei(unsigned tid); /** Returns if a specific PC is a PAL mode PC. */ diff --git a/src/cpu/o3/alpha/cpu_impl.hh b/src/cpu/o3/alpha/cpu_impl.hh index b7362fad9..a57c5d9ed 100644 --- a/src/cpu/o3/alpha/cpu_impl.hh +++ b/src/cpu/o3/alpha/cpu_impl.hh @@ -242,20 +242,6 @@ AlphaO3CPU<Impl>::post_interrupt(int int_num, int index) } template <class Impl> -int -AlphaO3CPU<Impl>::readIntrFlag() -{ - return this->regFile.readIntrFlag(); -} - -template <class Impl> -void -AlphaO3CPU<Impl>::setIntrFlag(int val) -{ - this->regFile.setIntrFlag(val); -} - -template <class Impl> Fault AlphaO3CPU<Impl>::hwrei(unsigned tid) { diff --git a/src/cpu/o3/alpha/dyn_inst_impl.hh b/src/cpu/o3/alpha/dyn_inst_impl.hh index b273a7b9b..f27cd5961 100644 --- a/src/cpu/o3/alpha/dyn_inst_impl.hh +++ b/src/cpu/o3/alpha/dyn_inst_impl.hh @@ -128,20 +128,6 @@ AlphaDynInst<Impl>::hwrei() } template <class Impl> -int -AlphaDynInst<Impl>::readIntrFlag() -{ - return this->cpu->readIntrFlag(); -} - -template <class Impl> -void -AlphaDynInst<Impl>::setIntrFlag(int val) -{ - this->cpu->setIntrFlag(val); -} - -template <class Impl> bool AlphaDynInst<Impl>::inPalMode() { diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh index 512cf0721..10f6db390 100644 --- a/src/cpu/o3/regfile.hh +++ b/src/cpu/o3/regfile.hh @@ -251,12 +251,6 @@ class PhysRegFile cpu->tcBase(thread_id)); } -#if FULL_SYSTEM - int readIntrFlag() { return intrflag; } - /** Sets an interrupt flag. */ - void setIntrFlag(int val) { intrflag = val; } -#endif - public: /** (signed) integer register file. */ IntReg *intRegFile; diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh index 70ec1d101..bd46b198b 100644 --- a/src/cpu/ozone/cpu.hh +++ b/src/cpu/ozone/cpu.hh @@ -583,8 +583,6 @@ class OzoneCPU : public BaseCPU #if FULL_SYSTEM Fault hwrei(); - int readIntrFlag() { return thread.intrflag; } - void setIntrFlag(int val) { thread.intrflag = val; } bool inPalMode() { return AlphaISA::PcPAL(thread.PC); } bool inPalMode(Addr pc) { return AlphaISA::PcPAL(pc); } bool simPalCheck(int palFunc); diff --git a/src/cpu/ozone/dyn_inst.hh b/src/cpu/ozone/dyn_inst.hh index e7390626e..d3871568a 100644 --- a/src/cpu/ozone/dyn_inst.hh +++ b/src/cpu/ozone/dyn_inst.hh @@ -238,8 +238,6 @@ class OzoneDynInst : public BaseDynInst<Impl> #if FULL_SYSTEM Fault hwrei(); - int readIntrFlag(); - void setIntrFlag(int val); bool inPalMode(); void trap(Fault fault); bool simPalCheck(int palFunc); diff --git a/src/cpu/ozone/dyn_inst_impl.hh b/src/cpu/ozone/dyn_inst_impl.hh index 9d42ab05b..d86f2dc8b 100644 --- a/src/cpu/ozone/dyn_inst_impl.hh +++ b/src/cpu/ozone/dyn_inst_impl.hh @@ -261,20 +261,6 @@ OzoneDynInst<Impl>::hwrei() } template <class Impl> -int -OzoneDynInst<Impl>::readIntrFlag() -{ -return this->cpu->readIntrFlag(); -} - -template <class Impl> -void -OzoneDynInst<Impl>::setIntrFlag(int val) -{ - this->cpu->setIntrFlag(val); -} - -template <class Impl> bool OzoneDynInst<Impl>::inPalMode() { diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh index 1a9fc5127..1d208b8df 100644 --- a/src/cpu/simple/base.hh +++ b/src/cpu/simple/base.hh @@ -305,8 +305,6 @@ class BaseSimpleCPU : public BaseCPU #if FULL_SYSTEM Fault hwrei() { return thread->hwrei(); } - int readIntrFlag() { return thread->readIntrFlag(); } - void setIntrFlag(int val) { thread->setIntrFlag(val); } bool inPalMode() { return thread->inPalMode(); } void ev5_trap(Fault fault) { fault->invoke(tc); } bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); } diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh index 10ec8faaa..d005b2914 100644 --- a/src/cpu/simple_thread.hh +++ b/src/cpu/simple_thread.hh @@ -168,8 +168,6 @@ class SimpleThread : public ThreadState void dumpFuncProfile(); - int readIntrFlag() { return regs.intrflag; } - void setIntrFlag(int val) { regs.intrflag = val; } Fault hwrei(); bool simPalCheck(int palFunc); |