diff options
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/SConscript | 4 | ||||
| -rw-r--r-- | src/cpu/base.hh | 9 | ||||
| -rw-r--r-- | src/cpu/intr_control_noisa.cc | 54 |
3 files changed, 65 insertions, 2 deletions
diff --git a/src/cpu/SConscript b/src/cpu/SConscript index c52dbc53b..999de1e49 100644 --- a/src/cpu/SConscript +++ b/src/cpu/SConscript @@ -30,7 +30,9 @@ Import('*') -if env['TARGET_ISA'] == 'no': +if env['TARGET_ISA'] == 'null': + SimObject('IntrControl.py') + Source('intr_control_noisa.cc') Return() ################################################################# diff --git a/src/cpu/base.hh b/src/cpu/base.hh index 9e7198763..540c72833 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -48,11 +48,16 @@ #include <vector> +// Before we do anything else, check if this build is the NULL ISA, +// and if so stop here +#include "config/the_isa.hh" +#if THE_ISA == NULL_ISA +#include "arch/null/cpu_dummy.hh" +#else #include "arch/interrupts.hh" #include "arch/isa_traits.hh" #include "arch/microcode_rom.hh" #include "base/statistics.hh" -#include "config/the_isa.hh" #include "mem/mem_object.hh" #include "sim/eventq.hh" #include "sim/full_system.hh" @@ -476,4 +481,6 @@ class BaseCPU : public MemObject Stats::Scalar numWorkItemsCompleted; }; +#endif // THE_ISA == NULL_ISA + #endif // __CPU_BASE_HH__ diff --git a/src/cpu/intr_control_noisa.cc b/src/cpu/intr_control_noisa.cc new file mode 100644 index 000000000..ff49976d0 --- /dev/null +++ b/src/cpu/intr_control_noisa.cc @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2002-2005 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Nathan Binkert + * Ron Dreslinski + */ + +#include "cpu/intr_control.hh" + +using namespace std; + +IntrControl::IntrControl(const Params *p) + : SimObject(p), sys(p->sys) +{} + +void +IntrControl::post(int cpu_id, int int_num, int index) +{ +} + +void +IntrControl::clear(int cpu_id, int int_num, int index) +{ +} + +IntrControl * +IntrControlParams::create() +{ + return new IntrControl(this); +} |