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-rw-r--r--src/cpu/simple/base.cc16
1 files changed, 10 insertions, 6 deletions
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 4fed2059b..aa341487c 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -70,7 +70,7 @@ using namespace std;
using namespace TheISA;
BaseSimpleCPU::BaseSimpleCPU(Params *p)
- : BaseCPU(p), thread(NULL), predecoder(NULL)
+ : BaseCPU(p), traceData(NULL), thread(NULL), predecoder(NULL)
{
#if FULL_SYSTEM
thread = new SimpleThread(this, 0, p->system, p->itb, p->dtb);
@@ -326,18 +326,20 @@ BaseSimpleCPU::checkForInterrupts()
Fault
BaseSimpleCPU::setupFetchRequest(Request *req)
{
+ uint64_t threadPC = thread->readPC();
+
// set up memory request for instruction fetch
#if ISA_HAS_DELAY_SLOT
- DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",thread->readPC(),
+ DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",threadPC,
thread->readNextPC(),thread->readNextNPC());
#else
- DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p",thread->readPC(),
+ DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p",threadPC,
thread->readNextPC());
#endif
- req->setVirt(0, thread->readPC() & ~3, sizeof(MachInst),
- (FULL_SYSTEM && (thread->readPC() & 1)) ? PHYSICAL : 0,
- thread->readPC());
+ req->setVirt(0, threadPC & ~3, sizeof(MachInst),
+ (FULL_SYSTEM && (threadPC & 1)) ? PHYSICAL : 0,
+ threadPC);
Fault fault = thread->translateInstReq(req);
@@ -396,6 +398,7 @@ BaseSimpleCPU::preExecute()
fetchMicroOp(thread->readMicroPC());
}
+#if TRACING_ON
//If we decoded an instruction this "tick", record information about it.
if(curStaticInst)
{
@@ -409,6 +412,7 @@ BaseSimpleCPU::preExecute()
thread->setInst(inst);
#endif // FULL_SYSTEM
}
+#endif // TRACING_ON
}
void