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-rw-r--r--src/cpu/base.cc11
-rw-r--r--src/cpu/base.hh2
-rw-r--r--src/cpu/intr_control.cc22
-rw-r--r--src/cpu/intr_control.hh4
-rw-r--r--src/cpu/o3/dyn_inst.hh4
-rw-r--r--src/cpu/simple/base.cc2
6 files changed, 23 insertions, 22 deletions
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index d5a023c59..104b3b6bb 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -372,12 +372,6 @@ BaseCPU::ProfileEvent::process()
}
void
-BaseCPU::post_interrupt(int int_type)
-{
- interrupts.post(int_type);
-}
-
-void
BaseCPU::post_interrupt(int int_num, int index)
{
interrupts.post(int_num, index);
@@ -395,6 +389,11 @@ BaseCPU::clear_interrupts()
interrupts.clear_all();
}
+uint64_t
+BaseCPU::get_interrupts(int int_num)
+{
+ return interrupts.get_vec(int_num);
+}
void
BaseCPU::serialize(std::ostream &os)
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index a1265b748..d4213887d 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -102,10 +102,10 @@ class BaseCPU : public MemObject
TheISA::Interrupts interrupts;
public:
- virtual void post_interrupt(int int_type);
virtual void post_interrupt(int int_num, int index);
virtual void clear_interrupt(int int_num, int index);
virtual void clear_interrupts();
+ virtual uint64_t get_interrupts(int int_num);
bool check_interrupts(ThreadContext * tc) const
{ return interrupts.check_interrupts(tc); }
diff --git a/src/cpu/intr_control.cc b/src/cpu/intr_control.cc
index 4cbc86891..be0f6599b 100644
--- a/src/cpu/intr_control.cc
+++ b/src/cpu/intr_control.cc
@@ -40,18 +40,14 @@
using namespace std;
-IntrControl::IntrControl(const string &name, BaseCPU *c)
- : SimObject(name), cpu(c)
+IntrControl::IntrControl(const string &name, System *s)
+ : SimObject(name), sys(s)
{}
-/* @todo
- *Fix the cpu sim object parameter to be a system pointer
- *instead, to avoid some extra dereferencing
- */
void
IntrControl::post(int int_num, int index)
{
- std::vector<ThreadContext *> &tcvec = cpu->system->threadContexts;
+ std::vector<ThreadContext *> &tcvec = sys->threadContexts;
BaseCPU *temp = tcvec[0]->getCpuPtr();
temp->post_interrupt(int_num, index);
}
@@ -59,7 +55,7 @@ IntrControl::post(int int_num, int index)
void
IntrControl::post(int cpu_id, int int_num, int index)
{
- std::vector<ThreadContext *> &tcvec = cpu->system->threadContexts;
+ std::vector<ThreadContext *> &tcvec = sys->threadContexts;
BaseCPU *temp = tcvec[cpu_id]->getCpuPtr();
temp->post_interrupt(int_num, index);
}
@@ -67,7 +63,7 @@ IntrControl::post(int cpu_id, int int_num, int index)
void
IntrControl::clear(int int_num, int index)
{
- std::vector<ThreadContext *> &tcvec = cpu->system->threadContexts;
+ std::vector<ThreadContext *> &tcvec = sys->threadContexts;
BaseCPU *temp = tcvec[0]->getCpuPtr();
temp->clear_interrupt(int_num, index);
}
@@ -75,26 +71,26 @@ IntrControl::clear(int int_num, int index)
void
IntrControl::clear(int cpu_id, int int_num, int index)
{
- std::vector<ThreadContext *> &tcvec = cpu->system->threadContexts;
+ std::vector<ThreadContext *> &tcvec = sys->threadContexts;
BaseCPU *temp = tcvec[cpu_id]->getCpuPtr();
temp->clear_interrupt(int_num, index);
}
BEGIN_DECLARE_SIM_OBJECT_PARAMS(IntrControl)
- SimObjectParam<BaseCPU *> cpu;
+ SimObjectParam<System *> sys;
END_DECLARE_SIM_OBJECT_PARAMS(IntrControl)
BEGIN_INIT_SIM_OBJECT_PARAMS(IntrControl)
- INIT_PARAM(cpu, "the cpu")
+ INIT_PARAM(sys, "the system we are part of")
END_INIT_SIM_OBJECT_PARAMS(IntrControl)
CREATE_SIM_OBJECT(IntrControl)
{
- return new IntrControl(getInstanceName(), cpu);
+ return new IntrControl(getInstanceName(), sys);
}
REGISTER_SIM_OBJECT("IntrControl", IntrControl)
diff --git a/src/cpu/intr_control.hh b/src/cpu/intr_control.hh
index 2e3f9e038..c6f75abf0 100644
--- a/src/cpu/intr_control.hh
+++ b/src/cpu/intr_control.hh
@@ -42,8 +42,8 @@
class IntrControl : public SimObject
{
public:
- BaseCPU *cpu;
- IntrControl(const std::string &name, BaseCPU *c);
+ System *sys;
+ IntrControl(const std::string &name, System *s);
void clear(int int_num, int index = 0);
void post(int int_num, int index = 0);
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index 279513493..c37f8007e 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -45,6 +45,10 @@
template <class Impl> class SparcDynInst;
struct SparcSimpleImpl;
typedef SparcDynInst<SparcSimpleImpl> O3DynInst;
+#elif THE_ISA == X86_ISA
+ template <class Impl> class X86DynInst;
+ struct X86SimpleImpl;
+ typedef X86DynInst<X86SimpleImpl> O3DynInst;
#else
#error "O3DynInst not defined for this ISA"
#endif
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 80b137909..f6c109127 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -371,6 +371,8 @@ BaseSimpleCPU::preExecute()
StaticInstPtr instPtr = StaticInst::decode(makeExtMI(inst, thread->readPC()));
#elif THE_ISA == SPARC_ISA
StaticInstPtr instPtr = StaticInst::decode(makeExtMI(inst, thread->getTC()));
+#elif THE_ISA == X86_ISA
+ StaticInstPtr instPtr = StaticInst::decode(makeExtMI(inst, thread->getTC()));
#elif THE_ISA == MIPS_ISA
//Mips doesn't do anything in it's MakeExtMI function right now,
//so it won't be called.