diff options
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/o3/commit.hh | 15 | ||||
| -rw-r--r-- | src/cpu/o3/commit_impl.hh | 8 |
2 files changed, 21 insertions, 2 deletions
diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh index 7183889c6..659b0ad5f 100644 --- a/src/cpu/o3/commit.hh +++ b/src/cpu/o3/commit.hh @@ -1,4 +1,16 @@ /* + * Copyright (c) 2010 ARM Limited + * All rights reserved. + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 2004-2006 The Regents of The University of Michigan * All rights reserved. * @@ -409,6 +421,9 @@ class DefaultCommit /** The sequence number of the youngest valid instruction in the ROB. */ InstSeqNum youngestSeqNum[Impl::MaxThreads]; + /** The sequence number of the last commited instruction. */ + InstSeqNum lastCommitedSeqNum[Impl::MaxThreads]; + /** Records if there is a trap currently in flight. */ bool trapInFlight[Impl::MaxThreads]; diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index 78e9a8848..a49e1497e 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -141,6 +141,7 @@ DefaultCommit<Impl>::DefaultCommit(O3CPU *_cpu, DerivO3CPUParams *params) trapSquash[tid] = false; tcSquash[tid] = false; pc[tid].set(0); + lastCommitedSeqNum[tid] = 0; } #if FULL_SYSTEM interrupt = NoFault; @@ -498,12 +499,12 @@ DefaultCommit<Impl>::squashAll(ThreadID tid) // Hopefully this doesn't mess things up. Basically I want to squash // all instructions of this thread. InstSeqNum squashed_inst = rob->isEmpty() ? - 0 : rob->readHeadInst(tid)->seqNum - 1; + lastCommitedSeqNum[tid] : rob->readHeadInst(tid)->seqNum - 1; // All younger instructions will be squashed. Set the sequence // number as the youngest instruction in the ROB (0 in this case. // Hopefully nothing breaks.) - youngestSeqNum[tid] = 0; + youngestSeqNum[tid] = lastCommitedSeqNum[tid]; rob->squash(squashed_inst, tid); changedROBNumEntries[tid] = true; @@ -960,6 +961,9 @@ DefaultCommit<Impl>::commitInsts() TheISA::advancePC(pc[tid], head_inst->staticInst); + // Keep track of the last sequence number commited + lastCommitedSeqNum[tid] = head_inst->seqNum; + // If this is an instruction that doesn't play nicely with // others squash everything and restart fetch if (head_inst->isSquashAfter()) |