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-rw-r--r--src/cpu/base_dyn_inst.hh13
-rw-r--r--src/cpu/checker/cpu.hh16
-rw-r--r--src/cpu/o3/cpu.hh16
-rw-r--r--src/cpu/ozone/cpu.hh16
-rw-r--r--src/cpu/simple/base.hh15
-rw-r--r--src/cpu/simple_thread.hh16
6 files changed, 92 insertions, 0 deletions
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index 74b250207..bea680fac 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -92,6 +92,19 @@ class BaseDynInst : public FastAlloc, public RefCounted
/** InstRecord that tracks this instructions. */
Trace::InstRecord *traceData;
+ void demapPage(Addr vaddr, uint64_t asn)
+ {
+ cpu->demapPage(vaddr, asn);
+ }
+ void demapInstPage(Addr vaddr, uint64_t asn)
+ {
+ cpu->demapPage(vaddr, asn);
+ }
+ void demapDataPage(Addr vaddr, uint64_t asn)
+ {
+ cpu->demapPage(vaddr, asn);
+ }
+
/**
* Does a read to a given address.
* @param addr The address to read.
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 7b3628986..35dc59ff4 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -324,6 +324,22 @@ class CheckerCPU : public BaseCPU
void recordPCChange(uint64_t val) { changedPC = true; newPC = val; }
void recordNextPCChange(uint64_t val) { changedNextPC = true; }
+ void demapPage(Addr vaddr, uint64_t asn)
+ {
+ this->itb->demapPage(vaddr, asn);
+ this->dtb->demapPage(vaddr, asn);
+ }
+
+ void demapInstPage(Addr vaddr, uint64_t asn)
+ {
+ this->itb->demapPage(vaddr, asn);
+ }
+
+ void demapDataPage(Addr vaddr, uint64_t asn)
+ {
+ this->dtb->demapPage(vaddr, asn);
+ }
+
bool translateInstReq(Request *req);
void translateDataWriteReq(Request *req);
void translateDataReadReq(Request *req);
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index e902968c1..61d7dcf22 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -263,6 +263,22 @@ class FullO3CPU : public BaseO3CPU
/** Registers statistics. */
void fullCPURegStats();
+ void demapPage(Addr vaddr, uint64_t asn)
+ {
+ this->itb->demapPage(vaddr, asn);
+ this->dtb->demapPage(vaddr, asn);
+ }
+
+ void demapInstPage(Addr vaddr, uint64_t asn)
+ {
+ this->itb->demapPage(vaddr, asn);
+ }
+
+ void demapDataPage(Addr vaddr, uint64_t asn)
+ {
+ this->dtb->demapPage(vaddr, asn);
+ }
+
/** Translates instruction requestion. */
Fault translateInstReq(RequestPtr &req, Thread *thread)
{
diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh
index 61abae807..b0ea2cba9 100644
--- a/src/cpu/ozone/cpu.hh
+++ b/src/cpu/ozone/cpu.hh
@@ -423,6 +423,22 @@ class OzoneCPU : public BaseCPU
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string &section);
+ void demapPage(Addr vaddr, uint64_t asn)
+ {
+ itb->demap(vaddr, asn);
+ dtb->demap(vaddr, asn);
+ }
+
+ void demapInstPage(Addr vaddr, uint64_t asn)
+ {
+ itb->demap(vaddr, asn);
+ }
+
+ void demapDataPage(Addr vaddr, uint64_t asn)
+ {
+ dtb->demap(vaddr, asn);
+ }
+
#if FULL_SYSTEM
/** Translates instruction requestion. */
Fault translateInstReq(RequestPtr &req, OzoneThreadState<Impl> *thread)
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 8c162a846..918965fdb 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -367,6 +367,21 @@ class BaseSimpleCPU : public BaseCPU
return thread->setMiscReg(reg_idx, val);
}
+ void demapPage(Addr vaddr, uint64_t asn)
+ {
+ thread->demapPage(vaddr, asn);
+ }
+
+ void demapInstPage(Addr vaddr, uint64_t asn)
+ {
+ thread->demapInstPage(vaddr, asn);
+ }
+
+ void demapDataPage(Addr vaddr, uint64_t asn)
+ {
+ thread->demapDataPage(vaddr, asn);
+ }
+
unsigned readStCondFailures() {
return thread->readStCondFailures();
}
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 2b79c9708..fa80a283a 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -163,6 +163,22 @@ class SimpleThread : public ThreadState
return dtb->translate(req, tc, true);
}
+ void demapPage(Addr vaddr, uint64_t asn)
+ {
+ itb->demapPage(vaddr, asn);
+ dtb->demapPage(vaddr, asn);
+ }
+
+ void demapInstPage(Addr vaddr, uint64_t asn)
+ {
+ itb->demapPage(vaddr, asn);
+ }
+
+ void demapDataPage(Addr vaddr, uint64_t asn)
+ {
+ dtb->demapPage(vaddr, asn);
+ }
+
#if FULL_SYSTEM
int getInstAsid() { return regs.instAsid(); }
int getDataAsid() { return regs.dataAsid(); }