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-rw-r--r--src/cpu/simple/timing.cc7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 523d81d0b..6774d79a9 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -451,7 +451,12 @@ TimingSimpleCPU::completeIfetch(Packet *pkt)
bool
TimingSimpleCPU::IcachePort::recvTiming(Packet *pkt)
{
- cpu->completeIfetch(pkt);
+ if (cpu->_status == DcacheWaitResponse)
+ cpu->completeDataAccess(pkt);
+ else if (cpu->_status == IcacheWaitResponse)
+ cpu->completeIfetch(pkt);
+ else
+ assert("OOPS" && 0);
return true;
}