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-rw-r--r--src/cpu/checker/cpu.cc2
-rw-r--r--src/cpu/simple/atomic.cc16
-rw-r--r--src/cpu/simple/timing.cc8
3 files changed, 22 insertions, 4 deletions
diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc
index 7dacc58ff..16b779e06 100644
--- a/src/cpu/checker/cpu.cc
+++ b/src/cpu/checker/cpu.cc
@@ -326,7 +326,7 @@ CheckerCPU::checkFlags(Request *req)
{
// Remove any dynamic flags that don't have to do with the request itself.
unsigned flags = unverifiedReq->getFlags();
- unsigned mask = LOCKED | PHYSICAL | VPTE | ALTMODE | UNCACHEABLE | NO_FAULT;
+ unsigned mask = LOCKED | PHYSICAL | VPTE | ALTMODE | UNCACHEABLE | PREFETCH;
flags = flags & (mask);
if (flags == req->getFlags()) {
return false;
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index cd4f5457e..c092b5b1f 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -353,8 +353,14 @@ AtomicSimpleCPU::read(Addr addr, T &data, unsigned flags)
recordEvent("Uncached Read");
//If there's a fault, return it
- if (fault != NoFault)
- return fault;
+ if (fault != NoFault) {
+ if (req->isPrefetch()) {
+ return NoFault;
+ } else {
+ return fault;
+ }
+ }
+
//If we don't need to access a second cache line, stop now.
if (secondAddr <= addr)
{
@@ -531,7 +537,11 @@ AtomicSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
assert(locked);
locked = false;
}
- return fault;
+ if (fault != NoFault && req->isPrefetch()) {
+ return NoFault;
+ } else {
+ return fault;
+ }
}
/*
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 8d3bae3f6..6b22d2fcf 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -273,6 +273,8 @@ TimingSimpleCPU::sendData(Fault fault, RequestPtr req,
{
_status = Running;
if (fault != NoFault) {
+ if (req->isPrefetch())
+ fault = NoFault;
delete data;
delete req;
@@ -315,6 +317,10 @@ TimingSimpleCPU::sendSplitData(Fault fault1, Fault fault2,
{
_status = Running;
if (fault1 != NoFault || fault2 != NoFault) {
+ if (req1->isPrefetch())
+ fault1 = NoFault;
+ if (req2->isPrefetch())
+ fault2 = NoFault;
delete data;
delete req1;
delete req2;
@@ -360,6 +366,8 @@ TimingSimpleCPU::sendSplitData(Fault fault1, Fault fault2,
void
TimingSimpleCPU::translationFault(Fault fault)
{
+ // fault may be NoFault in cases where a fault is suppressed,
+ // for instance prefetches.
numCycles += tickToCycles(curTick - previousTick);
previousTick = curTick;