diff options
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/BaseCPU.py | 23 | ||||
-rw-r--r-- | src/cpu/kvm/BaseKvmCPU.py | 10 | ||||
-rw-r--r-- | src/cpu/kvm/X86KvmCPU.py | 19 |
3 files changed, 25 insertions, 27 deletions
diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py index 7b8a615ea..550ba62ac 100644 --- a/src/cpu/BaseCPU.py +++ b/src/cpu/BaseCPU.py @@ -43,6 +43,7 @@ import sys +from m5.SimObject import * from m5.defines import buildEnv from m5.params import * from m5.proxy import * @@ -96,18 +97,16 @@ class BaseCPU(MemObject): abstract = True cxx_header = "cpu/base.hh" - @classmethod - def export_methods(cls, code): - code(''' - void switchOut(); - void takeOverFrom(BaseCPU *cpu); - bool switchedOut(); - void flushTLBs(); - Counter totalInsts(); - void scheduleInstStop(ThreadID tid, Counter insts, const char *cause); - void scheduleLoadStop(ThreadID tid, Counter loads, const char *cause); - uint64_t getCurrentInstCount(ThreadID tid); -''') + cxx_exports = [ + PyBindMethod("switchOut"), + PyBindMethod("takeOverFrom"), + PyBindMethod("switchedOut"), + PyBindMethod("flushTLBs"), + PyBindMethod("totalInsts"), + PyBindMethod("scheduleInstStop"), + PyBindMethod("scheduleLoadStop"), + PyBindMethod("getCurrentInstCount"), + ] @classmethod def memory_mode(cls): diff --git a/src/cpu/kvm/BaseKvmCPU.py b/src/cpu/kvm/BaseKvmCPU.py index cc0b28fe9..cb9bf481a 100644 --- a/src/cpu/kvm/BaseKvmCPU.py +++ b/src/cpu/kvm/BaseKvmCPU.py @@ -35,6 +35,7 @@ # # Authors: Andreas Sandberg +from m5.SimObject import * from m5.params import * from m5.proxy import * @@ -46,11 +47,10 @@ class BaseKvmCPU(BaseCPU): cxx_header = "cpu/kvm/base.hh" abstract = True - @classmethod - def export_methods(cls, code): - code(''' - void dump() const; -''') + @cxxMethod + def dump(self): + """Dump the internal state of KVM to standard out.""" + pass @classmethod def memory_mode(cls): diff --git a/src/cpu/kvm/X86KvmCPU.py b/src/cpu/kvm/X86KvmCPU.py index 18a4d3d6f..411db7dbe 100644 --- a/src/cpu/kvm/X86KvmCPU.py +++ b/src/cpu/kvm/X86KvmCPU.py @@ -27,21 +27,20 @@ # Authors: Andreas Sandberg from m5.params import * +from m5.SimObject import * from BaseKvmCPU import BaseKvmCPU class X86KvmCPU(BaseKvmCPU): type = 'X86KvmCPU' cxx_header = "cpu/kvm/x86_cpu.hh" - @classmethod - def export_methods(cls, code): - code(''' - void dumpFpuRegs(); - void dumpIntRegs(); - void dumpSpecRegs(); - void dumpXCRs(); - void dumpXSave(); - void dumpVCpuEvents(); -''') + cxx_exports = [ + PyBindMethod("dumpFpuRegs"), + PyBindMethod("dumpIntRegs"), + PyBindMethod("dumpSpecRegs"), + PyBindMethod("dumpXCRs"), + PyBindMethod("dumpXSave"), + PyBindMethod("dumpVCpuEvents"), + ] useXSave = Param.Bool(True, "Use XSave to synchronize FPU/SIMD registers") |