diff options
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/base_dyn_inst.hh | 14 | ||||
-rw-r--r-- | src/cpu/exec_context.hh | 6 | ||||
-rw-r--r-- | src/cpu/inorder/inorder_dyn_inst.cc | 8 | ||||
-rw-r--r-- | src/cpu/inorder/inorder_dyn_inst.hh | 6 | ||||
-rw-r--r-- | src/cpu/simple/atomic.cc | 8 | ||||
-rw-r--r-- | src/cpu/simple/atomic.hh | 6 | ||||
-rw-r--r-- | src/cpu/simple/timing.cc | 8 | ||||
-rw-r--r-- | src/cpu/simple/timing.hh | 6 |
8 files changed, 31 insertions, 31 deletions
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh index 53b2c9b96..f0d36cc83 100644 --- a/src/cpu/base_dyn_inst.hh +++ b/src/cpu/base_dyn_inst.hh @@ -124,10 +124,10 @@ class BaseDynInst : public FastAlloc, public RefCounted cpu->demapPage(vaddr, asn); } - Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags); + Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags); - Fault writeBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res); + Fault writeMem(uint8_t *data, unsigned size, + Addr addr, unsigned flags, uint64_t *res); /** Splits a request in two if it crosses a dcache block. */ void splitRequest(RequestPtr req, RequestPtr &sreqLow, @@ -841,8 +841,8 @@ class BaseDynInst : public FastAlloc, public RefCounted template<class Impl> Fault -BaseDynInst<Impl>::readBytes(Addr addr, uint8_t *data, - unsigned size, unsigned flags) +BaseDynInst<Impl>::readMem(Addr addr, uint8_t *data, + unsigned size, unsigned flags) { reqMade = true; Request *req = NULL; @@ -893,8 +893,8 @@ BaseDynInst<Impl>::readBytes(Addr addr, uint8_t *data, template<class Impl> Fault -BaseDynInst<Impl>::writeBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res) +BaseDynInst<Impl>::writeMem(uint8_t *data, unsigned size, + Addr addr, unsigned flags, uint64_t *res) { if (traceData) { traceData->setAddr(addr); diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh index 7b395808c..61c9b24a9 100644 --- a/src/cpu/exec_context.hh +++ b/src/cpu/exec_context.hh @@ -106,10 +106,10 @@ class ExecContext { /** Returns a pointer to the ThreadContext. */ ThreadContext *tcBase(); - Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags); + Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags); - Fault writeBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res); + Fault writeMem(uint8_t *data, unsigned size, + Addr addr, unsigned flags, uint64_t *res); #if FULL_SYSTEM /** Somewhat Alpha-specific function that handles returning from diff --git a/src/cpu/inorder/inorder_dyn_inst.cc b/src/cpu/inorder/inorder_dyn_inst.cc index de228afa0..5343206c1 100644 --- a/src/cpu/inorder/inorder_dyn_inst.cc +++ b/src/cpu/inorder/inorder_dyn_inst.cc @@ -559,15 +559,15 @@ InOrderDynInst::deallocateContext(int thread_num) } Fault -InOrderDynInst::readBytes(Addr addr, uint8_t *data, - unsigned size, unsigned flags) +InOrderDynInst::readMem(Addr addr, uint8_t *data, + unsigned size, unsigned flags) { return cpu->read(this, addr, data, size, flags); } Fault -InOrderDynInst::writeBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res) +InOrderDynInst::writeMem(uint8_t *data, unsigned size, + Addr addr, unsigned flags, uint64_t *res) { return cpu->write(this, data, size, addr, flags, res); } diff --git a/src/cpu/inorder/inorder_dyn_inst.hh b/src/cpu/inorder/inorder_dyn_inst.hh index d0f5a55a7..ecaf23aab 100644 --- a/src/cpu/inorder/inorder_dyn_inst.hh +++ b/src/cpu/inorder/inorder_dyn_inst.hh @@ -613,10 +613,10 @@ class InOrderDynInst : public FastAlloc, public RefCounted // //////////////////////////////////////////// - Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags); + Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags); - Fault writeBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res); + Fault writeMem(uint8_t *data, unsigned size, + Addr addr, unsigned flags, uint64_t *res); /** Initiates a memory access - Calculate Eff. Addr & Initiate Memory * Access Only valid for memory operations. diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index e01f9e17b..5376519d4 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -299,8 +299,8 @@ AtomicSimpleCPU::suspendContext(int thread_num) Fault -AtomicSimpleCPU::readBytes(Addr addr, uint8_t * data, - unsigned size, unsigned flags) +AtomicSimpleCPU::readMem(Addr addr, uint8_t * data, + unsigned size, unsigned flags) { // use the CPU's statically allocated read request and packet objects Request *req = &data_read_req; @@ -387,8 +387,8 @@ AtomicSimpleCPU::readBytes(Addr addr, uint8_t * data, Fault -AtomicSimpleCPU::writeBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res) +AtomicSimpleCPU::writeMem(uint8_t *data, unsigned size, + Addr addr, unsigned flags, uint64_t *res) { // use the CPU's statically allocated write request and packet objects Request *req = &data_write_req; diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh index 75a83caa7..246afa0b2 100644 --- a/src/cpu/simple/atomic.hh +++ b/src/cpu/simple/atomic.hh @@ -131,10 +131,10 @@ class AtomicSimpleCPU : public BaseSimpleCPU virtual void activateContext(int thread_num, int delay); virtual void suspendContext(int thread_num); - Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags); + Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags); - Fault writeBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res); + Fault writeMem(uint8_t *data, unsigned size, + Addr addr, unsigned flags, uint64_t *res); /** * Print state of address in memory system via PrintReq (for diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 853834d1d..1c726ba57 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -432,8 +432,8 @@ TimingSimpleCPU::buildSplitPacket(PacketPtr &pkt1, PacketPtr &pkt2, } Fault -TimingSimpleCPU::readBytes(Addr addr, uint8_t *data, - unsigned size, unsigned flags) +TimingSimpleCPU::readMem(Addr addr, uint8_t *data, + unsigned size, unsigned flags) { Fault fault; const int asid = 0; @@ -500,8 +500,8 @@ TimingSimpleCPU::handleWritePacket() } Fault -TimingSimpleCPU::writeBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res) +TimingSimpleCPU::writeMem(uint8_t *data, unsigned size, + Addr addr, unsigned flags, uint64_t *res) { uint8_t *newData = new uint8_t[size]; memcpy(newData, data, size); diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index 7525031c5..4301dfca7 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -256,10 +256,10 @@ class TimingSimpleCPU : public BaseSimpleCPU virtual void activateContext(int thread_num, int delay); virtual void suspendContext(int thread_num); - Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags); + Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags); - Fault writeBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res); + Fault writeMem(uint8_t *data, unsigned size, + Addr addr, unsigned flags, uint64_t *res); void fetch(); void sendFetch(Fault fault, RequestPtr req, ThreadContext *tc); |