diff options
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/SConscript | 8 | ||||
| -rw-r--r-- | src/cpu/activity.cc | 6 | ||||
| -rw-r--r-- | src/cpu/exetrace.hh | 3 | ||||
| -rw-r--r-- | src/cpu/simple/base.hh | 3 |
4 files changed, 12 insertions, 8 deletions
diff --git a/src/cpu/SConscript b/src/cpu/SConscript index 5771a7904..4d4b7574c 100644 --- a/src/cpu/SConscript +++ b/src/cpu/SConscript @@ -54,18 +54,18 @@ execfile(models_db.srcnode().abspath) exec_sig_template = ''' virtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0; virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const -{ panic("initiateAcc not defined!"); }; +{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN }; virtual Fault completeAcc(Packet *pkt, %s *xc, Trace::InstRecord *traceData) const -{ panic("completeAcc not defined!"); }; +{ panic("completeAcc not defined!"); M5_DUMMY_RETURN }; ''' mem_ini_sig_template = ''' -virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); }; +virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN }; ''' mem_comp_sig_template = ''' -virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; }; +virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN }; ''' # Generate a temporary CPU list, including the CheckerCPU if diff --git a/src/cpu/activity.cc b/src/cpu/activity.cc index 9a0f6d98d..15e0556ad 100644 --- a/src/cpu/activity.cc +++ b/src/cpu/activity.cc @@ -28,6 +28,8 @@ * Authors: Kevin Lim */ +#include <cstring> + #include "base/timebuf.hh" #include "cpu/activity.hh" @@ -37,7 +39,7 @@ ActivityRecorder::ActivityRecorder(int num_stages, int longest_latency, activityCount(activity), numStages(num_stages) { stageActive = new bool[numStages]; - memset(stageActive, 0, numStages); + std::memset(stageActive, 0, numStages); } void @@ -114,7 +116,7 @@ void ActivityRecorder::reset() { activityCount = 0; - memset(stageActive, 0, numStages); + std::memset(stageActive, 0, numStages); for (int i = 0; i < longestLatency + 1; ++i) activityBuffer.advance(); } diff --git a/src/cpu/exetrace.hh b/src/cpu/exetrace.hh index 6562e5265..a825f6a82 100644 --- a/src/cpu/exetrace.hh +++ b/src/cpu/exetrace.hh @@ -32,6 +32,7 @@ #ifndef __EXETRACE_HH__ #define __EXETRACE_HH__ +#include <cstring> #include <fstream> #include <vector> @@ -169,7 +170,7 @@ InstRecord::setRegs(const IntRegFile ®s) if (!iregs) iregs = new iRegFile; - memcpy(&iregs->regs, ®s, sizeof(IntRegFile)); + std::memcpy(&iregs->regs, ®s, sizeof(IntRegFile)); regs_valid = true; } diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh index c39bfa9cd..31fd00977 100644 --- a/src/cpu/simple/base.hh +++ b/src/cpu/simple/base.hh @@ -186,7 +186,8 @@ class BaseSimpleCPU : public BaseCPU // These functions are only used in CPU models that split // effective address computation from the actual memory access. void setEA(Addr EA) { panic("BaseSimpleCPU::setEA() not implemented\n"); } - Addr getEA() { panic("BaseSimpleCPU::getEA() not implemented\n"); } + Addr getEA() { panic("BaseSimpleCPU::getEA() not implemented\n"); + M5_DUMMY_RETURN} void prefetch(Addr addr, unsigned flags) { |