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-rw-r--r--src/cpu/checker/thread_context.hh15
-rw-r--r--src/cpu/inorder/cpu.cc26
-rw-r--r--src/cpu/inorder/cpu.hh9
-rw-r--r--src/cpu/inorder/thread_context.cc18
-rw-r--r--src/cpu/inorder/thread_context.hh9
-rw-r--r--src/cpu/o3/cpu.cc35
-rw-r--r--src/cpu/o3/cpu.hh11
-rwxr-xr-xsrc/cpu/o3/thread_context.hh9
-rwxr-xr-xsrc/cpu/o3/thread_context_impl.hh25
-rw-r--r--src/cpu/ozone/cpu.hh17
-rw-r--r--src/cpu/ozone/cpu_impl.hh20
-rw-r--r--src/cpu/simple_thread.hh28
-rw-r--r--src/cpu/thread_context.hh17
13 files changed, 0 insertions, 239 deletions
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index 524e87cd4..3c87f841f 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -277,21 +277,6 @@ class CheckerThreadContext : public ThreadContext
bool misspeculating() { return actualTC->misspeculating(); }
#if !FULL_SYSTEM
- IntReg getSyscallArg(int i) { return actualTC->getSyscallArg(i); }
-
- // used to shift args for indirect syscall
- void setSyscallArg(int i, IntReg val)
- {
- checkerTC->setSyscallArg(i, val);
- actualTC->setSyscallArg(i, val);
- }
-
- void setSyscallReturn(SyscallReturn return_value)
- {
- checkerTC->setSyscallReturn(return_value);
- actualTC->setSyscallReturn(return_value);
- }
-
Counter readFuncExeInst() { return actualTC->readFuncExeInst(); }
#endif
};
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
index adbf645f4..c22dd1154 100644
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -1281,32 +1281,6 @@ InOrderCPU::syscall(int64_t callnum, int tid)
nonSpecInstActive[tid] = false;
}
-IntReg
-InOrderCPU::getSyscallArg(int idx, int tid)
-{
- return readIntReg(ArgumentReg0 + idx, tid);
-}
-
-void
-InOrderCPU::setSyscallArg(int idx, IntReg val, int tid)
-{
- setIntReg(ArgumentReg0 + idx, val, tid);
-}
-
-void
-InOrderCPU::setSyscallReturn(SyscallReturn return_value, int tid)
-{
- if (return_value.successful()) {
- // no error
- setIntReg(SyscallSuccessReg, 0, tid);
- setIntReg(ReturnValueReg, return_value.value(), tid);
- } else {
- // got an error, return details
- setIntReg(SyscallSuccessReg, (IntReg) -1, tid);
- setIntReg(ReturnValueReg, -return_value.value(), tid);
- }
-}
-
Fault
InOrderCPU::read(DynInstPtr inst)
{
diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh
index 4a7dfb404..e27687a72 100644
--- a/src/cpu/inorder/cpu.hh
+++ b/src/cpu/inorder/cpu.hh
@@ -511,15 +511,6 @@ class InOrderCPU : public BaseCPU
/** Executes a syscall.*/
void syscall(int64_t callnum, int tid);
- /** Gets a syscall argument. */
- IntReg getSyscallArg(int i, int tid);
-
- /** Used to shift args for indirect syscall. */
- void setSyscallArg(int i, IntReg val, int tid);
-
- /** Sets the return value of a syscall. */
- void setSyscallReturn(SyscallReturn return_value, int tid);
-
public:
/** Per-Thread List of all the instructions in flight. */
std::list<DynInstPtr> instList[ThePipeline::MaxThreads];
diff --git a/src/cpu/inorder/thread_context.cc b/src/cpu/inorder/thread_context.cc
index 2470ee676..13f8ecdad 100644
--- a/src/cpu/inorder/thread_context.cc
+++ b/src/cpu/inorder/thread_context.cc
@@ -262,21 +262,3 @@ InOrderThreadContext::setMiscReg(int misc_reg, const MiscReg &val)
{
cpu->setMiscReg(misc_reg, val, thread->readTid());
}
-
-TheISA::IntReg
-InOrderThreadContext::getSyscallArg(int i)
-{
- return cpu->getSyscallArg(i, thread->readTid());
-}
-
-void
-InOrderThreadContext::setSyscallArg(int i, IntReg val)
-{
- cpu->setSyscallArg(i, val, thread->readTid());
-}
-
-void
-InOrderThreadContext::setSyscallReturn(SyscallReturn return_value)
-{
- cpu->setSyscallReturn(return_value, thread->readTid());
-}
diff --git a/src/cpu/inorder/thread_context.hh b/src/cpu/inorder/thread_context.hh
index 708dcf6b3..dce150b47 100644
--- a/src/cpu/inorder/thread_context.hh
+++ b/src/cpu/inorder/thread_context.hh
@@ -236,15 +236,6 @@ class InOrderThreadContext : public ThreadContext
* misspeculating, this is set as false. */
virtual bool misspeculating() { return false; }
- /** Gets a syscall argument by index. */
- virtual IntReg getSyscallArg(int i);
-
- /** Sets a syscall argument. */
- virtual void setSyscallArg(int i, IntReg val);
-
- /** Sets the syscall return value. */
- virtual void setSyscallReturn(SyscallReturn return_value);
-
/** Executes a syscall in SE mode. */
virtual void syscall(int64_t callnum)
{ return cpu->syscall(callnum, thread->readTid()); }
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 4f6d5d41c..1d7fb97c0 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -420,34 +420,6 @@ FullO3CPU<Impl>::FullO3CPU(DerivO3CPUParams *params)
lockFlag = false;
}
-#if !FULL_SYSTEM
-
-template <class Impl>
-TheISA::IntReg
-FullO3CPU<Impl>::getSyscallArg(int i, int tid)
-{
- assert(i < TheISA::NumArgumentRegs);
- TheISA::IntReg idx = TheISA::flattenIntIndex(this->tcBase(tid),
- TheISA::ArgumentReg[i]);
- TheISA::IntReg val = this->readArchIntReg(idx, tid);
-#if THE_ISA == SPARC_ISA
- if (bits(this->readMiscRegNoEffect(SparcISA::MISCREG_PSTATE, tid), 3, 3))
- val = bits(val, 31, 0);
-#endif
- return val;
-}
-
-template <class Impl>
-void
-FullO3CPU<Impl>::setSyscallArg(int i, TheISA::IntReg val, int tid)
-{
- assert(i < TheISA::NumArgumentRegs);
- TheISA::IntReg idx = TheISA::flattenIntIndex(this->tcBase(tid),
- TheISA::ArgumentReg[i]);
- this->setArchIntReg(idx, val, tid);
-}
-#endif
-
template <class Impl>
FullO3CPU<Impl>::~FullO3CPU()
{
@@ -1000,13 +972,6 @@ FullO3CPU<Impl>::syscall(int64_t callnum, int tid)
--(this->thread[tid]->funcExeInst);
}
-template <class Impl>
-void
-FullO3CPU<Impl>::setSyscallReturn(SyscallReturn return_value, int tid)
-{
- TheISA::setSyscallReturn(return_value, this->tcBase(tid));
-}
-
#endif
template <class Impl>
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 683e4284f..f4ed28e8e 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -193,13 +193,6 @@ class FullO3CPU : public BaseO3CPU
activateThreadEvent[tid].squash();
}
-#if !FULL_SYSTEM
- TheISA::IntReg getSyscallArg(int i, int tid);
-
- /** Used to shift args for indirect syscall. */
- void setSyscallArg(int i, TheISA::IntReg val, int tid);
-#endif
-
/** The tick event used for scheduling CPU ticks. */
ActivateThreadEvent activateThreadEvent[Impl::MaxThreads];
@@ -354,10 +347,6 @@ class FullO3CPU : public BaseO3CPU
* @todo: Determine if this needs to be virtual.
*/
void syscall(int64_t callnum, int tid);
-
- /** Sets the return value of a syscall. */
- void setSyscallReturn(SyscallReturn return_value, int tid);
-
#endif
/** Starts draining the CPU's pipeline of all instructions in
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index 6de773ff1..f3058925d 100755
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -247,15 +247,6 @@ class O3ThreadContext : public ThreadContext
virtual bool misspeculating() { return false; }
#if !FULL_SYSTEM
- /** Gets a syscall argument by index. */
- virtual IntReg getSyscallArg(int i);
-
- /** Sets a syscall argument. */
- virtual void setSyscallArg(int i, IntReg val);
-
- /** Sets the syscall return value. */
- virtual void setSyscallReturn(SyscallReturn return_value);
-
/** Executes a syscall in SE mode. */
virtual void syscall(int64_t callnum)
{ return cpu->syscall(callnum, thread->threadId()); }
diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh
index 12b2d1b31..fc8b66b83 100755
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -482,28 +482,3 @@ O3ThreadContext<Impl>::setMiscReg(int misc_reg,
}
}
-#if !FULL_SYSTEM
-
-template <class Impl>
-TheISA::IntReg
-O3ThreadContext<Impl>::getSyscallArg(int i)
-{
- return cpu->getSyscallArg(i, thread->threadId());
-}
-
-template <class Impl>
-void
-O3ThreadContext<Impl>::setSyscallArg(int i, IntReg val)
-{
- cpu->setSyscallArg(i, val, thread->threadId());
-}
-
-template <class Impl>
-void
-O3ThreadContext<Impl>::setSyscallReturn(SyscallReturn return_value)
-{
- cpu->setSyscallReturn(return_value, thread->threadId());
-}
-
-#endif // FULL_SYSTEM
-
diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh
index 0eb4b31f7..054fc1aa1 100644
--- a/src/cpu/ozone/cpu.hh
+++ b/src/cpu/ozone/cpu.hh
@@ -246,22 +246,6 @@ class OzoneCPU : public BaseCPU
bool misspeculating() { return false; }
#if !FULL_SYSTEM
- TheISA::IntReg getSyscallArg(int i)
- {
- assert(i < TheISA::NumArgumentRegs);
- return thread->renameTable[TheISA::ArgumentReg[i]]->readIntResult();
- }
-
- // used to shift args for indirect syscall
- void setSyscallArg(int i, TheISA::IntReg val)
- {
- assert(i < TheISA::NumArgumentRegs);
- thread->renameTable[TheISA::ArgumentReg[i]]->setIntResult(i);
- }
-
- void setSyscallReturn(SyscallReturn return_value)
- { cpu->setSyscallReturn(return_value, thread->threadId()); }
-
Counter readFuncExeInst() { return thread->funcExeInst; }
void setFuncExeInst(Counter new_val)
@@ -468,7 +452,6 @@ class OzoneCPU : public BaseCPU
void processInterrupts();
#else
void syscall(uint64_t &callnum);
- void setSyscallReturn(SyscallReturn return_value, int tid);
#endif
ThreadContext *tcBase() { return tc; }
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index 84ee69464..aa76c8aa6 100644
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -648,26 +648,6 @@ OzoneCPU<Impl>::syscall(uint64_t &callnum)
frontEnd->renameTable.copyFrom(thread.renameTable);
backEnd->renameTable.copyFrom(thread.renameTable);
}
-
-template <class Impl>
-void
-OzoneCPU<Impl>::setSyscallReturn(SyscallReturn return_value, int tid)
-{
- // check for error condition. Alpha syscall convention is to
- // indicate success/failure in reg a3 (r19) and put the
- // return value itself in the standard return value reg (v0).
- if (return_value.successful()) {
- // no error
- thread.renameTable[SyscallSuccessReg]->setIntResult(0);
- thread.renameTable[ReturnValueReg]->setIntResult(
- return_value.value());
- } else {
- // got an error, return details
- thread.renameTable[SyscallSuccessReg]->setIntResult((IntReg) -1);
- thread.renameTable[ReturnValueReg]->setIntResult(
- -return_value.value());
- }
-}
#else
template <class Impl>
Fault
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 4eba493c3..73929d362 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -34,7 +34,6 @@
#include "arch/isa_traits.hh"
#include "arch/regfile.hh"
-#include "arch/syscallreturn.hh"
#include "arch/tlb.hh"
#include "config/full_system.hh"
#include "cpu/thread_context.hh"
@@ -367,33 +366,6 @@ class SimpleThread : public ThreadState
{ storeCondFailures = sc_failures; }
#if !FULL_SYSTEM
- TheISA::IntReg getSyscallArg(int i)
- {
- assert(i < TheISA::NumArgumentRegs);
- TheISA::IntReg val = regs.readIntReg(
- TheISA::flattenIntIndex(getTC(), TheISA::ArgumentReg[i]));
-#if THE_ISA == SPARC_ISA
- if (bits(this->readMiscRegNoEffect(
- SparcISA::MISCREG_PSTATE), 3, 3)) {
- val = bits(val, 31, 0);
- }
-#endif
- return val;
- }
-
- // used to shift args for indirect syscall
- void setSyscallArg(int i, TheISA::IntReg val)
- {
- assert(i < TheISA::NumArgumentRegs);
- regs.setIntReg(TheISA::flattenIntIndex(getTC(),
- TheISA::ArgumentReg[i]), val);
- }
-
- void setSyscallReturn(SyscallReturn return_value)
- {
- TheISA::setSyscallReturn(return_value, getTC());
- }
-
void syscall(int64_t callnum)
{
process->syscall(callnum, tc);
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 7c3f11c12..700f1571e 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -38,7 +38,6 @@
#include "sim/faults.hh"
#include "sim/host.hh"
#include "sim/serialize.hh"
-#include "sim/syscallreturn.hh"
#include "sim/byteswap.hh"
// @todo: Figure out a more architecture independent way to obtain the ITB and
@@ -258,13 +257,6 @@ class ThreadContext
virtual bool misspeculating() = 0;
#if !FULL_SYSTEM
- virtual IntReg getSyscallArg(int i) = 0;
-
- // used to shift args for indirect syscall
- virtual void setSyscallArg(int i, IntReg val) = 0;
-
- virtual void setSyscallReturn(SyscallReturn return_value) = 0;
-
// Same with st cond failures.
virtual Counter readFuncExeInst() = 0;
@@ -457,15 +449,6 @@ class ProxyThreadContext : public ThreadContext
bool misspeculating() { return actualTC->misspeculating(); }
#if !FULL_SYSTEM
- IntReg getSyscallArg(int i) { return actualTC->getSyscallArg(i); }
-
- // used to shift args for indirect syscall
- void setSyscallArg(int i, IntReg val)
- { actualTC->setSyscallArg(i, val); }
-
- void setSyscallReturn(SyscallReturn return_value)
- { actualTC->setSyscallReturn(return_value); }
-
void syscall(int64_t callnum)
{ actualTC->syscall(callnum); }
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-05 16:25:04 +0000