diff options
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/SConscript | 1 | ||||
-rw-r--r-- | src/cpu/decode_cache.cc | 113 | ||||
-rw-r--r-- | src/cpu/decode_cache.hh | 107 |
3 files changed, 73 insertions, 148 deletions
diff --git a/src/cpu/SConscript b/src/cpu/SConscript index 4b327f8a1..e1ba59b8b 100644 --- a/src/cpu/SConscript +++ b/src/cpu/SConscript @@ -108,7 +108,6 @@ SimObject('NativeTrace.py') Source('activity.cc') Source('base.cc') Source('cpuevent.cc') -Source('decode_cache.cc') Source('exetrace.cc') Source('func_unit.cc') Source('inteltrace.cc') diff --git a/src/cpu/decode_cache.cc b/src/cpu/decode_cache.cc deleted file mode 100644 index 636bf9284..000000000 --- a/src/cpu/decode_cache.cc +++ /dev/null @@ -1,113 +0,0 @@ -/* - * Copyright (c) 2011-2012 Google - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black - */ - -#include "arch/decoder.hh" -#include "arch/isa_traits.hh" -#include "arch/types.hh" -#include "base/hashmap.hh" -#include "config/the_isa.hh" -#include "cpu/static_inst.hh" - -void -DecodeCache::DecodePages::update(PageIt recentest) -{ - recent[1] = recent[0]; - recent[0] = recentest; -} - -void -DecodeCache::DecodePages::addPage(Addr addr, DecodePage *page) -{ - Addr page_addr = addr & ~(TheISA::PageBytes - 1); - typename PageMap::value_type to_insert(page_addr, page); - update(pageMap.insert(to_insert).first); -} - -DecodeCache::DecodePages::DecodePages() -{ - recent[0] = recent[1] = pageMap.end(); -} - -DecodeCache::DecodePage * -DecodeCache::DecodePages::getPage(Addr addr) -{ - Addr page_addr = addr & ~(TheISA::PageBytes - 1); - - // Check against recent lookups. - if (recent[0] != pageMap.end()) { - if (recent[0]->first == page_addr) - return recent[0]->second; - if (recent[1] != pageMap.end() && - recent[1]->first == page_addr) { - update(recent[1]); - // recent[1] has just become recent[0]. - return recent[0]->second; - } - } - - // Actually look in the has_map. - PageIt it = pageMap.find(page_addr); - if (it != pageMap.end()) { - update(it); - return it->second; - } - - // Didn't find an existing page, so add a new one. - DecodePage *newPage = new DecodePage; - addPage(page_addr, newPage); - return newPage; -} - -StaticInstPtr -DecodeCache::decode(TheISA::Decoder *decoder, - ExtMachInst mach_inst, Addr addr) -{ - // Try to find a matching address based table of instructions. - DecodePage *page = decodePages.getPage(addr); - - // Use the table to decode the instruction. It will fall back to other - // mechanisms if it needs to. - Addr offset = addr & (TheISA::PageBytes - 1); - StaticInstPtr si = page->insts[offset]; - if (si && (si->machInst == mach_inst)) - return si; - - InstMap::iterator iter = instMap.find(mach_inst); - if (iter != instMap.end()) { - si = iter->second; - page->insts[offset] = si; - return si; - } - - si = decoder->decodeInst(mach_inst); - instMap[mach_inst] = si; - page->insts[offset] = si; - return si; -} diff --git a/src/cpu/decode_cache.hh b/src/cpu/decode_cache.hh index 473340586..34387419f 100644 --- a/src/cpu/decode_cache.hh +++ b/src/cpu/decode_cache.hh @@ -35,56 +35,95 @@ #include "arch/types.hh" #include "base/hashmap.hh" #include "config/the_isa.hh" -#include "cpu/static_inst.hh" +#include "cpu/static_inst_fwd.hh" namespace TheISA { class Decoder; } -class DecodeCache +namespace DecodeCache { - private: - typedef TheISA::ExtMachInst ExtMachInst; - /// Hash of decoded instructions. - typedef m5::hash_map<ExtMachInst, StaticInstPtr> InstMap; - InstMap instMap; - struct DecodePage { - StaticInstPtr insts[TheISA::PageBytes]; +/// Hash for decoded instructions. +typedef m5::hash_map<TheISA::ExtMachInst, StaticInstPtr> InstMap; + +/// A sparse map from an Addr to a Value, stored in page chunks. +template<class Value> +class AddrMap +{ + protected: + // A pages worth of cache entries. + struct CachePage { + Value items[TheISA::PageBytes]; }; + // A map of cache pages which allows a sparse mapping. + typedef typename m5::hash_map<Addr, CachePage *> PageMap; + typedef typename PageMap::iterator PageIt; + // Mini cache of recent lookups. + PageIt recent[2]; + PageMap pageMap; + + /// Update the mini cache of recent lookups. + /// @param recentest The most recent result; + void + update(PageIt recentest) + { + recent[1] = recent[0]; + recent[0] = recentest; + } - /// A store of DecodePages. Basically a slightly smarter hash_map. - class DecodePages + /// Attempt to find the CacheePage which goes with a particular + /// address. First check the small cache of recent results, then + /// actually look in the hash_map. + /// @param addr The address to look up. + CachePage * + getPage(Addr addr) { - protected: - typedef typename m5::hash_map<Addr, DecodePage *> PageMap; - typedef typename PageMap::iterator PageIt; - PageIt recent[2]; - PageMap pageMap; + Addr page_addr = addr & ~(TheISA::PageBytes - 1); - /// Update the small cache of recent lookups. - /// @param recentest The most recent result; - void update(PageIt recentest); - void addPage(Addr addr, DecodePage *page); + // Check against recent lookups. + if (recent[0] != pageMap.end()) { + if (recent[0]->first == page_addr) + return recent[0]->second; + if (recent[1] != pageMap.end() && + recent[1]->first == page_addr) { + update(recent[1]); + // recent[1] has just become recent[0]. + return recent[0]->second; + } + } - public: - /// Constructor - DecodePages(); + // Actually look in the has_map. + PageIt it = pageMap.find(page_addr); + if (it != pageMap.end()) { + update(it); + return it->second; + } - /// Attempt to find the DecodePage which goes with a particular - /// address. First check the small cache of recent results, then - /// actually look in the hash_map. - /// @param addr The address to look up. - DecodePage *getPage(Addr addr); - } decodePages; + // Didn't find an existing page, so add a new one. + CachePage *newPage = new CachePage; + page_addr = page_addr & ~(TheISA::PageBytes - 1); + typename PageMap::value_type to_insert(page_addr, newPage); + update(pageMap.insert(to_insert).first); + return newPage; + } public: - /// Decode a machine instruction. - /// @param mach_inst The binary instruction to decode. - /// @retval A pointer to the corresponding StaticInst object. - StaticInstPtr decode(TheISA::Decoder * const decoder, - ExtMachInst mach_inst, Addr addr); + /// Constructor + AddrMap() + { + recent[0] = recent[1] = pageMap.end(); + } + + Value & + lookup(Addr addr) + { + CachePage *page = getPage(addr); + return page->items[addr & (TheISA::PageBytes - 1)]; + } }; +} // namespace DecodeCache + #endif // __CPU_DECODE_CACHE_HH__ |