diff options
Diffstat (limited to 'src/cpu')
30 files changed, 97 insertions, 160 deletions
diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc index 9cb6b032e..2e81b7b31 100644 --- a/src/cpu/checker/cpu.cc +++ b/src/cpu/checker/cpu.cc @@ -72,6 +72,12 @@ CheckerCPU::CheckerCPU(Params *p) systemPtr = NULL; #else process = p->process; + thread = new SimpleThread(this, /* thread_num */ 0, process, + /* asid */ 0); + + thread->setStatus(ThreadContext::Suspended); + tc = thread->getTC(); + threadContexts.push_back(tc); #endif result.integer = 0; @@ -82,20 +88,6 @@ CheckerCPU::~CheckerCPU() } void -CheckerCPU::setMemory(MemObject *mem) -{ -#if !FULL_SYSTEM - memPtr = mem; - thread = new SimpleThread(this, /* thread_num */ 0, process, - /* asid */ 0, mem); - - thread->setStatus(ThreadContext::Suspended); - tc = thread->getTC(); - threadContexts.push_back(tc); -#endif -} - -void CheckerCPU::setSystem(System *system) { #if FULL_SYSTEM diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh index 00b01171f..336cb1714 100644 --- a/src/cpu/checker/cpu.hh +++ b/src/cpu/checker/cpu.hh @@ -112,10 +112,6 @@ class CheckerCPU : public BaseCPU Process *process; - void setMemory(MemObject *mem); - - MemObject *memPtr; - void setSystem(System *system); System *systemPtr; diff --git a/src/cpu/memtest/memtest.hh b/src/cpu/memtest/memtest.hh index edde4a3b2..2694efd39 100644 --- a/src/cpu/memtest/memtest.hh +++ b/src/cpu/memtest/memtest.hh @@ -97,7 +97,7 @@ class MemTest : public MemObject public: CpuPort(const std::string &_name, MemTest *_memtest) - : Port(_name), memtest(_memtest) + : Port(_name, _memtest), memtest(_memtest) { } protected: diff --git a/src/cpu/o3/alpha/cpu_builder.cc b/src/cpu/o3/alpha/cpu_builder.cc index ff123a6f7..ca316433b 100644 --- a/src/cpu/o3/alpha/cpu_builder.cc +++ b/src/cpu/o3/alpha/cpu_builder.cc @@ -61,8 +61,6 @@ Param<Tick> profile; SimObjectVectorParam<Process *> workload; #endif // FULL_SYSTEM -SimObjectParam<MemObject *> mem; - SimObjectParam<BaseCPU *> checker; Param<Counter> max_insts_any_thread; @@ -169,8 +167,6 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(DerivO3CPU) INIT_PARAM(workload, "Processes to run"), #endif // FULL_SYSTEM - INIT_PARAM(mem, "Memory"), - INIT_PARAM_DFLT(checker, "Checker CPU", NULL), INIT_PARAM_DFLT(max_insts_any_thread, @@ -314,8 +310,6 @@ CREATE_SIM_OBJECT(DerivO3CPU) params->workload = workload; #endif // FULL_SYSTEM - params->mem = mem; - params->checker = checker; params->max_insts_any_thread = max_insts_any_thread; diff --git a/src/cpu/o3/alpha/cpu_impl.hh b/src/cpu/o3/alpha/cpu_impl.hh index b7362fad9..5deee27de 100644 --- a/src/cpu/o3/alpha/cpu_impl.hh +++ b/src/cpu/o3/alpha/cpu_impl.hh @@ -77,24 +77,10 @@ AlphaO3CPU<Impl>::AlphaO3CPU(Params *params) if (i < params->workload.size()) { DPRINTF(O3CPU, "Workload[%i] process is %#x", i, this->thread[i]); - this->thread[i] = new Thread(this, i, params->workload[i], - i, params->mem); + this->thread[i] = new Thread(this, i, params->workload[i], i); this->thread[i]->setStatus(ThreadContext::Suspended); -#if !FULL_SYSTEM - /* Use this port to for syscall emulation writes to memory. */ - Port *mem_port; - TranslatingPort *trans_port; - trans_port = new TranslatingPort(csprintf("%s-%d-funcport", - name(), i), - params->workload[i]->pTable, - false); - mem_port = params->mem->getPort("functional"); - mem_port->setPeer(trans_port); - trans_port->setPeer(mem_port); - this->thread[i]->setMemPort(trans_port); -#endif //usedTids[i] = true; //threadMap[i] = i; } else { @@ -102,7 +88,7 @@ AlphaO3CPU<Impl>::AlphaO3CPU(Params *params) //when scheduling threads to CPU Process* dummy_proc = NULL; - this->thread[i] = new Thread(this, i, dummy_proc, i, params->mem); + this->thread[i] = new Thread(this, i, dummy_proc, i); //usedTids[i] = false; } #endif // !FULL_SYSTEM diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 367508288..dfe42d882 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -187,7 +187,6 @@ FullO3CPU<Impl>::FullO3CPU(Params *params) system(params->system), physmem(system->physmem), #endif // FULL_SYSTEM - mem(params->mem), drainCount(0), deferRegistration(params->deferRegistration), numThreads(number_of_threads) @@ -204,7 +203,6 @@ FullO3CPU<Impl>::FullO3CPU(Params *params) #if USE_CHECKER BaseCPU *temp_checker = params->checker; checker = dynamic_cast<Checker<DynInstPtr> *>(temp_checker); - checker->setMemory(mem); #if FULL_SYSTEM checker->setSystem(params->system); #endif diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index fe510519c..2bf9cb23b 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -620,9 +620,6 @@ class FullO3CPU : public BaseO3CPU PhysicalMemory *physmem; #endif - /** Pointer to memory. */ - MemObject *mem; - /** Event to call process() on once draining has completed. */ Event *drainEvent; diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh index 5555bff85..cc9a8abf5 100644 --- a/src/cpu/o3/fetch.hh +++ b/src/cpu/o3/fetch.hh @@ -329,8 +329,6 @@ class DefaultFetch /** Wire used to write any information heading to decode. */ typename TimeBuffer<FetchStruct>::wire toDecode; - MemObject *mem; - /** Icache interface. */ IcachePort *icachePort; diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index e7bf83b20..2b152e376 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -96,8 +96,7 @@ DefaultFetch<Impl>::IcachePort::recvRetry() template<class Impl> DefaultFetch<Impl>::DefaultFetch(Params *params) - : mem(params->mem), - branchPred(params), + : branchPred(params), decodeToFetchDelay(params->decodeToFetchDelay), renameToFetchDelay(params->renameToFetchDelay), iewToFetchDelay(params->iewToFetchDelay), diff --git a/src/cpu/o3/mips/cpu_builder.cc b/src/cpu/o3/mips/cpu_builder.cc index f1c3b33a5..ee9f2b48d 100644 --- a/src/cpu/o3/mips/cpu_builder.cc +++ b/src/cpu/o3/mips/cpu_builder.cc @@ -54,8 +54,6 @@ Param<int> activity; SimObjectVectorParam<Process *> workload; -SimObjectParam<MemObject *> mem; - SimObjectParam<BaseCPU *> checker; Param<Counter> max_insts_any_thread; @@ -153,8 +151,6 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(DerivO3CPU) INIT_PARAM(workload, "Processes to run"), - INIT_PARAM(mem, "Memory"), - INIT_PARAM_DFLT(checker, "Checker CPU", NULL), INIT_PARAM_DFLT(max_insts_any_thread, @@ -284,8 +280,6 @@ CREATE_SIM_OBJECT(DerivO3CPU) params->workload = workload; - params->mem = mem; - params->checker = checker; params->max_insts_any_thread = max_insts_any_thread; diff --git a/src/cpu/o3/mips/cpu_impl.hh b/src/cpu/o3/mips/cpu_impl.hh index e08741626..97116fd3e 100644 --- a/src/cpu/o3/mips/cpu_impl.hh +++ b/src/cpu/o3/mips/cpu_impl.hh @@ -58,24 +58,10 @@ MipsO3CPU<Impl>::MipsO3CPU(Params *params) if (i < params->workload.size()) { DPRINTF(O3CPU, "Workload[%i] process is %#x", i, this->thread[i]); - this->thread[i] = new Thread(this, i, params->workload[i], - i, params->mem); + this->thread[i] = new Thread(this, i, params->workload[i], i); this->thread[i]->setStatus(ThreadContext::Suspended); - - /* Use this port to for syscall emulation writes to memory. */ - Port *mem_port; - TranslatingPort *trans_port; - trans_port = new TranslatingPort(csprintf("%s-%d-funcport", - name(), i), - params->workload[i]->pTable, - false); - mem_port = params->mem->getPort("functional"); - mem_port->setPeer(trans_port); - trans_port->setPeer(mem_port); - this->thread[i]->setMemPort(trans_port); - //usedTids[i] = true; //threadMap[i] = i; } else { @@ -83,7 +69,7 @@ MipsO3CPU<Impl>::MipsO3CPU(Params *params) //when scheduling threads to CPU Process* dummy_proc = NULL; - this->thread[i] = new Thread(this, i, dummy_proc, i, params->mem); + this->thread[i] = new Thread(this, i, dummy_proc, i); //usedTids[i] = false; } diff --git a/src/cpu/o3/params.hh b/src/cpu/o3/params.hh index 1c234bcd7..b487778c6 100755 --- a/src/cpu/o3/params.hh +++ b/src/cpu/o3/params.hh @@ -54,8 +54,6 @@ class O3Params : public BaseO3CPU::Params Process *process; #endif // FULL_SYSTEM - MemObject *mem; - BaseCPU *checker; // diff --git a/src/cpu/o3/thread_state.hh b/src/cpu/o3/thread_state.hh index 5fe7bb94d..d8720b3ab 100644 --- a/src/cpu/o3/thread_state.hh +++ b/src/cpu/o3/thread_state.hh @@ -77,7 +77,7 @@ struct O3ThreadState : public ThreadState { #if FULL_SYSTEM O3ThreadState(O3CPU *_cpu, int _thread_num) - : ThreadState(-1, _thread_num), + : ThreadState(_cpu, -1, _thread_num), cpu(_cpu), inSyscall(0), trapPending(0) { if (cpu->params->profile) { @@ -95,9 +95,8 @@ struct O3ThreadState : public ThreadState { profilePC = 3; } #else - O3ThreadState(O3CPU *_cpu, int _thread_num, Process *_process, int _asid, - MemObject *mem) - : ThreadState(-1, _thread_num, _process, _asid, mem), + O3ThreadState(O3CPU *_cpu, int _thread_num, Process *_process, int _asid) + : ThreadState(_cpu, -1, _thread_num, _process, _asid), cpu(_cpu), inSyscall(0), trapPending(0) { } #endif diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh index 70ec1d101..28ff8e9ba 100644 --- a/src/cpu/ozone/cpu.hh +++ b/src/cpu/ozone/cpu.hh @@ -368,8 +368,6 @@ class OzoneCPU : public BaseCPU virtual Port *getPort(const std::string &name, int idx); - MemObject *mem; - FrontEnd *frontEnd; BackEnd *backEnd; diff --git a/src/cpu/ozone/cpu_builder.cc b/src/cpu/ozone/cpu_builder.cc index 730158258..39be9fd74 100644 --- a/src/cpu/ozone/cpu_builder.cc +++ b/src/cpu/ozone/cpu_builder.cc @@ -69,8 +69,6 @@ SimObjectVectorParam<Process *> workload; //SimObjectParam<PageTable *> page_table; #endif // FULL_SYSTEM -SimObjectParam<MemObject *> mem; - SimObjectParam<BaseCPU *> checker; Param<Counter> max_insts_any_thread; @@ -191,8 +189,6 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(DerivOzoneCPU) // INIT_PARAM(page_table, "Page table"), #endif // FULL_SYSTEM - INIT_PARAM_DFLT(mem, "Memory", NULL), - INIT_PARAM_DFLT(checker, "Checker CPU", NULL), INIT_PARAM_DFLT(max_insts_any_thread, @@ -350,7 +346,6 @@ CREATE_SIM_OBJECT(DerivOzoneCPU) // params->pTable = page_table; #endif // FULL_SYSTEM - params->mem = mem; params->checker = checker; params->max_insts_any_thread = max_insts_any_thread; params->max_insts_all_threads = max_insts_all_threads; diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh index bf547bf94..685bf3cb4 100644 --- a/src/cpu/ozone/cpu_impl.hh +++ b/src/cpu/ozone/cpu_impl.hh @@ -93,10 +93,10 @@ OzoneCPU<Impl>::OzoneCPU(Params *p) #if FULL_SYSTEM : BaseCPU(p), thread(this, 0), tickEvent(this, p->width), #else - : BaseCPU(p), thread(this, 0, p->workload[0], 0, p->mem), + : BaseCPU(p), thread(this, 0, p->workload[0], 0), tickEvent(this, p->width), #endif - mem(p->mem), comm(5, 5) + comm(5, 5) { frontEnd = new FrontEnd(p); backEnd = new BackEnd(p); @@ -107,7 +107,6 @@ OzoneCPU<Impl>::OzoneCPU(Params *p) #if USE_CHECKER BaseCPU *temp_checker = p->checker; checker = dynamic_cast<Checker<DynInstPtr> *>(temp_checker); - checker->setMemory(mem); #if FULL_SYSTEM checker->setSystem(p->system); #endif @@ -198,19 +197,7 @@ OzoneCPU<Impl>::OzoneCPU(Params *p) frontEnd->renameTable.copyFrom(thread.renameTable); backEnd->renameTable.copyFrom(thread.renameTable); -#if !FULL_SYSTEM - /* Use this port to for syscall emulation writes to memory. */ - Port *mem_port; - TranslatingPort *trans_port; - trans_port = new TranslatingPort(csprintf("%s-%d-funcport", - name(), 0), - p->workload[0]->pTable, - false); - mem_port = p->mem->getPort("functional"); - mem_port->setPeer(trans_port); - trans_port->setPeer(mem_port); - thread.setMemPort(trans_port); -#else +#if FULL_SYSTEM Port *mem_port; FunctionalPort *phys_port; VirtualPort *virt_port; diff --git a/src/cpu/ozone/front_end.hh b/src/cpu/ozone/front_end.hh index 2bdca35b9..e09e4de9c 100644 --- a/src/cpu/ozone/front_end.hh +++ b/src/cpu/ozone/front_end.hh @@ -208,8 +208,6 @@ class FrontEnd IcachePort icachePort; - MemObject *mem; - RequestPtr memReq; /** Mask to get a cache block's address. */ diff --git a/src/cpu/ozone/front_end_impl.hh b/src/cpu/ozone/front_end_impl.hh index 36e87ec9c..b8fce4292 100644 --- a/src/cpu/ozone/front_end_impl.hh +++ b/src/cpu/ozone/front_end_impl.hh @@ -91,7 +91,6 @@ template <class Impl> FrontEnd<Impl>::FrontEnd(Params *params) : branchPred(params), icachePort(this), - mem(params->mem), numInstsReady(params->frontEndLatency, 0), instBufferSize(0), maxInstBufferSize(params->maxInstBufferSize), diff --git a/src/cpu/ozone/lw_lsq.hh b/src/cpu/ozone/lw_lsq.hh index dc58a8285..7e6849668 100644 --- a/src/cpu/ozone/lw_lsq.hh +++ b/src/cpu/ozone/lw_lsq.hh @@ -239,8 +239,6 @@ class OzoneLWLSQ { /** Pointer to the back-end stage. */ BackEnd *be; - MemObject *mem; - class DcachePort : public Port { protected: diff --git a/src/cpu/ozone/lw_lsq_impl.hh b/src/cpu/ozone/lw_lsq_impl.hh index 1f3f18502..ee1968626 100644 --- a/src/cpu/ozone/lw_lsq_impl.hh +++ b/src/cpu/ozone/lw_lsq_impl.hh @@ -154,8 +154,6 @@ OzoneLWLSQ<Impl>::init(Params *params, unsigned maxLQEntries, SQIndices.push(i); } - mem = params->mem; - usedPorts = 0; cachePorts = params->cachePorts; diff --git a/src/cpu/ozone/simple_params.hh b/src/cpu/ozone/simple_params.hh index 3f63d2e1d..3e554c812 100644 --- a/src/cpu/ozone/simple_params.hh +++ b/src/cpu/ozone/simple_params.hh @@ -61,8 +61,6 @@ class SimpleParams : public BaseCPU::Params //Page Table PageTable *pTable; - MemObject *mem; - // // Caches // diff --git a/src/cpu/ozone/thread_state.hh b/src/cpu/ozone/thread_state.hh index c86f3552e..c226d7502 100644 --- a/src/cpu/ozone/thread_state.hh +++ b/src/cpu/ozone/thread_state.hh @@ -67,7 +67,7 @@ struct OzoneThreadState : public ThreadState { #if FULL_SYSTEM OzoneThreadState(CPUType *_cpu, int _thread_num) - : ThreadState(-1, _thread_num), + : ThreadState(_cpu, -1, _thread_num), intrflag(0), cpu(_cpu), inSyscall(0), trapPending(0) { if (cpu->params->profile) { @@ -87,8 +87,8 @@ struct OzoneThreadState : public ThreadState { } #else OzoneThreadState(CPUType *_cpu, int _thread_num, Process *_process, - int _asid, MemObject *mem) - : ThreadState(-1, _thread_num, _process, _asid, mem), + int _asid) + : ThreadState(_cpu, -1, _thread_num, _process, _asid), cpu(_cpu), inSyscall(0), trapPending(0) { miscRegFile.clear(); diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index edba55b0d..bfb80dc0f 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -72,15 +72,6 @@ AtomicSimpleCPU::getPort(const std::string &if_name, int idx) void AtomicSimpleCPU::init() { - //Create Memory Ports (conect them up) -// Port *mem_dport = mem->getPort(""); -// dcachePort.setPeer(mem_dport); -// mem_dport->setPeer(&dcachePort); - -// Port *mem_iport = mem->getPort(""); -// icachePort.setPeer(mem_iport); -// mem_iport->setPeer(&icachePort); - BaseCPU::init(); #if FULL_SYSTEM for (int i = 0; i < threadContexts.size(); ++i) { @@ -500,7 +491,6 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AtomicSimpleCPU) Param<Counter> max_loads_any_thread; Param<Counter> max_loads_all_threads; Param<Tick> progress_interval; - SimObjectParam<MemObject *> mem; SimObjectParam<System *> system; Param<int> cpu_id; @@ -533,7 +523,6 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(AtomicSimpleCPU) INIT_PARAM(max_loads_all_threads, "terminate when all threads have reached this load count"), INIT_PARAM(progress_interval, "Progress interval"), - INIT_PARAM(mem, "memory"), INIT_PARAM(system, "system object"), INIT_PARAM(cpu_id, "processor ID"), @@ -571,7 +560,6 @@ CREATE_SIM_OBJECT(AtomicSimpleCPU) params->functionTraceStart = function_trace_start; params->width = width; params->simulate_stalls = simulate_stalls; - params->mem = mem; params->system = system; params->cpu_id = cpu_id; diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc index cbb3980cb..dc06c17f5 100644 --- a/src/cpu/simple/base.cc +++ b/src/cpu/simple/base.cc @@ -70,13 +70,13 @@ using namespace std; using namespace TheISA; BaseSimpleCPU::BaseSimpleCPU(Params *p) - : BaseCPU(p), mem(p->mem), thread(NULL) + : BaseCPU(p), thread(NULL) { #if FULL_SYSTEM thread = new SimpleThread(this, 0, p->system, p->itb, p->dtb); #else thread = new SimpleThread(this, /* thread_num */ 0, p->process, - /* asid */ 0, mem); + /* asid */ 0); #endif // !FULL_SYSTEM thread->setStatus(ThreadContext::Suspended); diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh index af6b6f835..f382158dd 100644 --- a/src/cpu/simple/base.hh +++ b/src/cpu/simple/base.hh @@ -76,8 +76,6 @@ class BaseSimpleCPU : public BaseCPU typedef TheISA::FloatReg FloatReg; typedef TheISA::FloatRegBits FloatRegBits; - MemObject *mem; - protected: Trace::InstRecord *traceData; @@ -95,7 +93,6 @@ class BaseSimpleCPU : public BaseCPU public: struct Params : public BaseCPU::Params { - MemObject *mem; #if FULL_SYSTEM AlphaITB *itb; AlphaDTB *dtb; diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index fe6775ea4..9e1f091b5 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -660,7 +660,6 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(TimingSimpleCPU) Param<Counter> max_loads_any_thread; Param<Counter> max_loads_all_threads; Param<Tick> progress_interval; - SimObjectParam<MemObject *> mem; SimObjectParam<System *> system; Param<int> cpu_id; @@ -693,7 +692,6 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(TimingSimpleCPU) INIT_PARAM(max_loads_all_threads, "terminate when all threads have reached this load count"), INIT_PARAM(progress_interval, "Progress interval"), - INIT_PARAM(mem, "memory"), INIT_PARAM(system, "system object"), INIT_PARAM(cpu_id, "processor ID"), @@ -729,7 +727,6 @@ CREATE_SIM_OBJECT(TimingSimpleCPU) params->clock = clock; params->functionTrace = function_trace; params->functionTraceStart = function_trace_start; - params->mem = mem; params->system = system; params->cpu_id = cpu_id; diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc index 4fc47c982..c89a13eef 100644 --- a/src/cpu/simple_thread.cc +++ b/src/cpu/simple_thread.cc @@ -62,7 +62,7 @@ using namespace std; SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys, AlphaITB *_itb, AlphaDTB *_dtb, bool use_kernel_stats) - : ThreadState(-1, _thread_num), cpu(_cpu), system(_sys), itb(_itb), + : ThreadState(_cpu, -1, _thread_num), cpu(_cpu), system(_sys), itb(_itb), dtb(_dtb) { @@ -106,19 +106,10 @@ SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys, } #else SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, - Process *_process, int _asid, MemObject* memobj) - : ThreadState(-1, _thread_num, _process, _asid, memobj), + Process *_process, int _asid) + : ThreadState(_cpu, -1, _thread_num, _process, _asid), cpu(_cpu) { - /* Use this port to for syscall emulation writes to memory. */ - Port *mem_port; - port = new TranslatingPort(csprintf("%s-%d-funcport", - cpu->name(), tid), - process->pTable, false); - mem_port = memobj->getPort("functional"); - mem_port->setPeer(port); - port->setPeer(mem_port); - regs.clear(); tc = new ProxyThreadContext<SimpleThread>(this); } @@ -127,9 +118,9 @@ SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, SimpleThread::SimpleThread() #if FULL_SYSTEM - : ThreadState(-1, -1) + : ThreadState(NULL, -1, -1) #else - : ThreadState(-1, -1, NULL, -1, NULL) + : ThreadState(NULL, -1, -1, NULL, -1) #endif { tc = new ProxyThreadContext<SimpleThread>(this); @@ -332,6 +323,25 @@ SimpleThread::delVirtPort(VirtualPort *vp) } } +#else +TranslatingPort * +SimpleThread::getMemPort() +{ + if (port != NULL) + return port; + + /* Use this port to for syscall emulation writes to memory. */ + Port *dcache_port; + port = new TranslatingPort(csprintf("%s-%d-funcport", + cpu->name(), tid), + process->pTable, false); + dcache_port = cpu->getPort("dcache_port"); + assert(dcache_port != NULL); + dcache_port = dcache_port->getPeer(); +// mem_port->setPeer(port); + port->setPeer(dcache_port); + return port; +} #endif diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh index fe22e6c43..f002cbdce 100644 --- a/src/cpu/simple_thread.hh +++ b/src/cpu/simple_thread.hh @@ -117,8 +117,7 @@ class SimpleThread : public ThreadState AlphaITB *_itb, AlphaDTB *_dtb, bool use_kernel_stats = true); #else - SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process, int _asid, - MemObject *memobj); + SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process, int _asid); #endif SimpleThread(); @@ -174,6 +173,9 @@ class SimpleThread : public ThreadState bool simPalCheck(int palFunc); #else + // Override this function. + TranslatingPort *getMemPort(); + Fault translateInstReq(RequestPtr &req) { return process->pTable->translate(req); diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc index c644ae8d7..677ba6592 100644 --- a/src/cpu/thread_state.cc +++ b/src/cpu/thread_state.cc @@ -29,8 +29,11 @@ */ #include "base/output.hh" +#include "cpu/base.hh" #include "cpu/profile.hh" #include "cpu/thread_state.hh" +#include "mem/port.hh" +#include "mem/translating_port.hh" #include "sim/serialize.hh" #if FULL_SYSTEM @@ -39,15 +42,16 @@ #endif #if FULL_SYSTEM -ThreadState::ThreadState(int _cpuId, int _tid) - : cpuId(_cpuId), tid(_tid), lastActivate(0), lastSuspend(0), +ThreadState::ThreadState(BaseCPU *cpu, int _cpuId, int _tid) + : baseCpu(cpu), cpuId(_cpuId), tid(_tid), lastActivate(0), lastSuspend(0), profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL), + physPort(NULL), virtPort(NULL), microPC(0), nextMicroPC(1), funcExeInst(0), storeCondFailures(0) #else -ThreadState::ThreadState(int _cpuId, int _tid, Process *_process, - short _asid, MemObject *mem) - : cpuId(_cpuId), tid(_tid), lastActivate(0), lastSuspend(0), - process(_process), asid(_asid), +ThreadState::ThreadState(BaseCPU *cpu, int _cpuId, int _tid, Process *_process, + short _asid) + : baseCpu(cpu), cpuId(_cpuId), tid(_tid), lastActivate(0), lastSuspend(0), + port(NULL), process(_process), asid(_asid), microPC(0), nextMicroPC(1), funcExeInst(0), storeCondFailures(0) #endif { @@ -108,4 +112,31 @@ ThreadState::profileSample() profile->sample(profileNode, profilePC); } +#else +TranslatingPort * +ThreadState::getMemPort() +{ + if (port != NULL) + return port; + + /* Use this port to for syscall emulation writes to memory. */ + Port *dcache_port, *func_mem_port; + port = new TranslatingPort(csprintf("%s-%d-funcport", + baseCpu->name(), tid), + process->pTable, false); + + dcache_port = baseCpu->getPort("dcache_port"); + assert(dcache_port != NULL); + + MemObject *mem_object = dcache_port->getPeer()->getOwner(); + assert(mem_object != NULL); + + func_mem_port = mem_object->getPort("functional"); + assert(func_mem_port != NULL); + + func_mem_port->setPeer(port); + port->setPeer(func_mem_port); + + return port; +} #endif diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh index 60353760c..14673aabb 100644 --- a/src/cpu/thread_state.hh +++ b/src/cpu/thread_state.hh @@ -37,7 +37,6 @@ #if !FULL_SYSTEM #include "mem/mem_object.hh" -#include "mem/translating_port.hh" #include "sim/process.hh" #endif @@ -50,7 +49,9 @@ namespace Kernel { }; #endif +class BaseCPU; class Checkpoint; +class TranslatingPort; /** * Struct for holding general thread state that is needed across CPU @@ -62,10 +63,10 @@ struct ThreadState { typedef ThreadContext::Status Status; #if FULL_SYSTEM - ThreadState(int _cpuId, int _tid); + ThreadState(BaseCPU *cpu, int _cpuId, int _tid); #else - ThreadState(int _cpuId, int _tid, Process *_process, - short _asid, MemObject *mem); + ThreadState(BaseCPU *cpu, int _cpuId, int _tid, Process *_process, + short _asid); #endif void serialize(std::ostream &os); @@ -105,7 +106,7 @@ struct ThreadState { #else Process *getProcessPtr() { return process; } - TranslatingPort *getMemPort() { return port; } + TranslatingPort *getMemPort(); void setMemPort(TranslatingPort *_port) { port = _port; } @@ -153,6 +154,9 @@ struct ThreadState { protected: ThreadContext::Status _status; + // Pointer to the base CPU. + BaseCPU *baseCpu; + // ID of this context w.r.t. the System or Process object to which // it belongs. For full-system mode, this is the system CPU ID. int cpuId; |