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-rw-r--r--src/cpu/checker/cpu_impl.hh1
-rw-r--r--src/cpu/minor/fetch2.cc6
-rw-r--r--src/cpu/o3/fetch_impl.hh3
-rw-r--r--src/cpu/simple/base.cc2
4 files changed, 3 insertions, 9 deletions
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index 9e4bdcd52..fce4a9fc3 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -285,7 +285,6 @@ Checker<Impl>::verify(const DynInstPtr &completed_inst)
pkt->dataStatic(&machInst);
icachePort->sendFunctional(pkt);
- machInst = gtoh(machInst);
delete pkt;
}
diff --git a/src/cpu/minor/fetch2.cc b/src/cpu/minor/fetch2.cc
index d60a1bab0..f047d6816 100644
--- a/src/cpu/minor/fetch2.cc
+++ b/src/cpu/minor/fetch2.cc
@@ -376,12 +376,10 @@ Fetch2::evaluate()
} else {
uint8_t *line = line_in->line;
- TheISA::MachInst inst_word;
/* The instruction is wholly in the line, can just
* assign */
- inst_word = TheISA::gtoh(
- *(reinterpret_cast<TheISA::MachInst *>
- (line + fetch_info.inputIndex)));
+ auto inst_word = *reinterpret_cast<TheISA::MachInst *>
+ (line + fetch_info.inputIndex);
if (!decoder->instReady()) {
decoder->moreBytes(fetch_info.pc,
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 60542b824..47b1ad0c5 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1285,8 +1285,7 @@ DefaultFetch<Impl>::fetch(bool &status_change)
break;
}
- MachInst inst = TheISA::gtoh(cacheInsts[blkOffset]);
- decoder[tid]->moreBytes(thisPC, fetchAddr, inst);
+ decoder[tid]->moreBytes(thisPC, fetchAddr, cacheInsts[blkOffset]);
if (decoder[tid]->needMoreBytes()) {
blkOffset++;
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 3000fae53..566533c73 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -503,8 +503,6 @@ BaseSimpleCPU::preExecute()
thread->comInstEventQueue.serviceEvents(t_info.numInst);
// decode the instruction
- inst = gtoh(inst);
-
TheISA::PCState pcState = thread->pcState();
if (isRomMicroPC(pcState.microPC())) {