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Diffstat (limited to 'src/dev/arm/a9scu.cc')
-rw-r--r-- | src/dev/arm/a9scu.cc | 102 |
1 files changed, 102 insertions, 0 deletions
diff --git a/src/dev/arm/a9scu.cc b/src/dev/arm/a9scu.cc new file mode 100644 index 000000000..31d38b4ff --- /dev/null +++ b/src/dev/arm/a9scu.cc @@ -0,0 +1,102 @@ +/* + * Copyright (c) 2010 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Ali Saidi + */ + +#include "base/intmath.hh" +#include "base/trace.hh" +#include "dev/arm/a9scu.hh" +#include "mem/packet.hh" +#include "mem/packet_access.hh" +#include "sim/system.hh" + +A9SCU::A9SCU(Params *p) + : BasicPioDevice(p) +{ + pioSize = 0x60; +} + +Tick +A9SCU::read(PacketPtr pkt) +{ + assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); + assert(pkt->getSize() == 4); + Addr daddr = pkt->getAddr() - pioAddr; + pkt->allocate(); + + switch(daddr) { + case Control: + pkt->set(1); // SCU already enabled + break; + case Config: + assert(sys->numContexts() <= 4); + int smp_bits, core_cnt; + smp_bits = power(2,sys->numContexts()) - 1; + core_cnt = sys->numContexts() - 1; + pkt->set(smp_bits << 4 | core_cnt); + break; + default: + // Only configuration register is implemented + panic("Tried to read SCU at offset %#x\n", daddr); + break; + } + pkt->makeAtomicResponse(); + return pioDelay; + +} + +Tick +A9SCU::write(PacketPtr pkt) +{ + assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); + + Addr daddr = pkt->getAddr() - pioAddr; + switch (daddr) { + default: + // Nothing implemented at this point + panic("Tried to write SCU at offset %#x\n", daddr); + break; + } + pkt->makeAtomicResponse(); + return pioDelay; +} + +A9SCU * +A9SCUParams::create() +{ + return new A9SCU(this); +} |