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Diffstat (limited to 'src/dev/arm/ufs_device.cc')
-rw-r--r--src/dev/arm/ufs_device.cc13
1 files changed, 8 insertions, 5 deletions
diff --git a/src/dev/arm/ufs_device.cc b/src/dev/arm/ufs_device.cc
index 5a5a13215..cd1bbcafb 100644
--- a/src/dev/arm/ufs_device.cc
+++ b/src/dev/arm/ufs_device.cc
@@ -733,8 +733,8 @@ UFSHostDevice::UFSHostDevice(const UFSHostDeviceParams* p) :
transferTrack(0),
taskCommandTrack(0),
idlePhaseStart(0),
- SCSIResumeEvent(this),
- UTPEvent(this)
+ SCSIResumeEvent([this]{ SCSIStart(); }, name()),
+ UTPEvent([this]{ finalUTP(); }, name())
{
DPRINTF(UFSHostDevice, "The hostcontroller hosts %d Logic units\n",
lunAvail);
@@ -1280,7 +1280,8 @@ UFSHostDevice::requestHandler()
task_info.size = size;
task_info.done = UFSHCIMem.TMUTMRLDBR;
taskInfo.push_back(task_info);
- taskEventQueue.push_back(this);
+ taskEventQueue.push_back(
+ EventFunctionWrapper([this]{ taskStart(); }, name()));
writeDevice(&taskEventQueue.back(), false, address, size,
reinterpret_cast<uint8_t*>
(&taskInfo.back().destination), 0, 0);
@@ -1328,7 +1329,8 @@ UFSHostDevice::requestHandler()
UTPTransferReqDesc;
DPRINTF(UFSHostDevice, "Initial transfer start: 0x%8x\n",
transferstart_info.done);
- transferEventQueue.push_back(this);
+ transferEventQueue.push_back(
+ EventFunctionWrapper([this]{ transferStart(); }, name()));
if (transferEventQueue.size() < 2) {
writeDevice(&transferEventQueue.front(), false,
@@ -2260,7 +2262,8 @@ UFSHostDevice::readCallback()
UFSDevice[this_lun]->clearReadSignal();
SSDReadPending.push_back(UFSDevice[this_lun]->SSDReadInfo.front());
UFSDevice[this_lun]->SSDReadInfo.pop_front();
- readGarbageEventQueue.push_back(this);
+ readGarbageEventQueue.push_back(
+ EventFunctionWrapper([this]{ readGarbage(); }, name()));
//make sure the queue is popped a the end of the dma transaction
readDevice(false, SSDReadPending.front().offset,