summaryrefslogtreecommitdiff
path: root/src/dev/arm
diff options
context:
space:
mode:
Diffstat (limited to 'src/dev/arm')
-rw-r--r--src/dev/arm/RealView.py1
-rw-r--r--src/dev/arm/SConscript2
-rw-r--r--src/dev/arm/gic.cc8
-rw-r--r--src/dev/arm/gic.hh2
-rw-r--r--src/dev/arm/realview.cc12
-rw-r--r--src/dev/arm/realview.hh6
6 files changed, 10 insertions, 21 deletions
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index 96f3c8a61..11905ae79 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -83,6 +83,7 @@ class RealViewCtrl(BasicPioDevice):
class Gic(PioDevice):
type = 'Gic'
+ platform = Param.Platform(Parent.any, "Platform this device is part of.")
dist_addr = Param.Addr(0x1f001000, "Address for distributor")
cpu_addr = Param.Addr(0x1f000100, "Address for cpu")
dist_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to distributor")
diff --git a/src/dev/arm/SConscript b/src/dev/arm/SConscript
index 07a3e14ae..deedcb49f 100644
--- a/src/dev/arm/SConscript
+++ b/src/dev/arm/SConscript
@@ -39,7 +39,7 @@
Import('*')
-if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'arm':
+if env['TARGET_ISA'] == 'arm':
SimObject('RealView.py')
Source('a9scu.cc')
diff --git a/src/dev/arm/gic.cc b/src/dev/arm/gic.cc
index 2dac18c08..67520f865 100644
--- a/src/dev/arm/gic.cc
+++ b/src/dev/arm/gic.cc
@@ -45,6 +45,7 @@
#include "debug/Checkpoint.hh"
#include "debug/GIC.hh"
#include "debug/IPI.hh"
+#include "debug/Interrupt.hh"
#include "dev/arm/gic.hh"
#include "dev/arm/realview.hh"
#include "dev/terminal.hh"
@@ -52,9 +53,10 @@
#include "mem/packet_access.hh"
Gic::Gic(const Params *p)
- : PioDevice(p),distAddr(p->dist_addr), cpuAddr(p->cpu_addr),
- distPioDelay(p->dist_pio_delay), cpuPioDelay(p->cpu_pio_delay),
- intLatency(p->int_latency), enabled(false), itLines(p->it_lines)
+ : PioDevice(p), platform(p->platform), distAddr(p->dist_addr),
+ cpuAddr(p->cpu_addr), distPioDelay(p->dist_pio_delay),
+ cpuPioDelay(p->cpu_pio_delay), intLatency(p->int_latency),
+ enabled(false), itLines(p->it_lines)
{
itLinesLog2 = ceilLog2(itLines);
diff --git a/src/dev/arm/gic.hh b/src/dev/arm/gic.hh
index 4c43db660..6988d6ed1 100644
--- a/src/dev/arm/gic.hh
+++ b/src/dev/arm/gic.hh
@@ -124,6 +124,8 @@ class Gic : public PioDevice
Bitfield<12,10> cpu_id;
EndBitUnion(IAR)
+ Platform *platform;
+
/** Distributor address GIC listens at */
Addr distAddr;
diff --git a/src/dev/arm/realview.cc b/src/dev/arm/realview.cc
index 8cc318f89..b33624cc6 100644
--- a/src/dev/arm/realview.cc
+++ b/src/dev/arm/realview.cc
@@ -60,17 +60,7 @@ using namespace TheISA;
RealView::RealView(const Params *p)
: Platform(p), system(p->system)
-{
- // set the back pointer from the system to myself
- system->platform = this;
-}
-
-Tick
-RealView::intrFrequency()
-{
- panic("Need implementation\n");
- M5_DUMMY_RETURN
-}
+{}
void
RealView::postConsoleInt()
diff --git a/src/dev/arm/realview.hh b/src/dev/arm/realview.hh
index 8ec9db5fc..70647d47c 100644
--- a/src/dev/arm/realview.hh
+++ b/src/dev/arm/realview.hh
@@ -82,12 +82,6 @@ class RealView : public Platform
void setGic(Gic *_gic) { gic = _gic; }
/**
- * Return the interrupting frequency to AlphaAccess
- * @return frequency of RTC interrupts
- */
- virtual Tick intrFrequency();
-
- /**
* Cause the cpu to post a serial interrupt to the CPU.
*/
virtual void postConsoleInt();