1 files changed, 90 insertions, 0 deletions
diff --git a/src/dev/serial/simple.cc b/src/dev/serial/simple.cc
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+++ b/src/dev/serial/simple.cc
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+/*
+ * Copyright (c) 2018 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Sandberg
+ */
+
+#include "dev/serial/simple.hh"
+
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
+#include "params/SimpleUart.hh"
+#include "sim/sim_exit.hh"
+
+SimpleUart::SimpleUart(const SimpleUartParams *p)
+    : Uart(p, p->pio_size),
+      byteOrder(p->big_endian ? BigEndianByteOrder : LittleEndianByteOrder),
+      endOnEOT(p->end_on_eot)
+{
+}
+
+Tick
+SimpleUart::read(PacketPtr pkt)
+{
+    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+
+    uint64_t data = 0;
+
+    if (device->dataAvailable())
+        data = device->readData();
+
+    pkt->setUintX(data, byteOrder);
+
+    pkt->makeAtomicResponse();
+    return pioDelay;
+}
+
+Tick
+SimpleUart::write(PacketPtr pkt)
+{
+
+    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+
+    uint8_t data = (uint8_t)pkt->getUintX(byteOrder);
+    if (data == 0x04 && endOnEOT)
+        exitSimLoop("UART received EOT", 0);
+
+    device->writeData(data);
+
+    pkt->makeAtomicResponse();
+    return pioDelay;
+}
+
+SimpleUart *
+SimpleUartParams::create()
+{
+    return new SimpleUart(this);
+}