1 files changed, 8 insertions, 0 deletions
diff --git a/src/dev/x86/Opteron.py b/src/dev/x86/Opteron.py
index 435ecccb6..cb015e2e7 100644
--- a/src/dev/x86/Opteron.py
+++ b/src/dev/x86/Opteron.py
@@ -3,8 +3,16 @@ from m5.proxy import *
 from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr
 from Uart import Uart8250
 from Platform import Platform
+from Pci import PciConfigAll
 from SimConsole import SimConsole
 
 class Opteron(Platform):
     type = 'Opteron'
     system = Param.System(Parent.any, "system")
+
+    pciconfig = PciConfigAll()
+
+    def attachIO(self, bus):
+        self.pciconfig.pio = bus.default
+        bus.responder_set = True
+        bus.responder = self.pciconfig