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Diffstat (limited to 'src/dev/x86/SouthBridge.py')
| -rw-r--r-- | src/dev/x86/SouthBridge.py | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py index 9f7070e96..87f4c3798 100644 --- a/src/dev/x86/SouthBridge.py +++ b/src/dev/x86/SouthBridge.py @@ -85,7 +85,7 @@ class SouthBridge(SimObject): ide.InterruptLine = 14 ide.InterruptPin = 1 - def attachIO(self, bus): + def attachIO(self, bus, dma_ports): # Route interupt signals self.int_lines = \ [X86IntLine(source=self.pic1.output, sink=self.io_apic.pin(0)), @@ -106,7 +106,8 @@ class SouthBridge(SimObject): self.dma1.pio = bus.master self.ide.pio = bus.master self.ide.config = bus.master - self.ide.dma = bus.slave + if dma_ports.count(self.ide.dma) == 0: + self.ide.dma = bus.slave self.keyboard.pio = bus.master self.pic1.pio = bus.master self.pic2.pio = bus.master |