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Diffstat (limited to 'src/dev/x86/SouthBridge.py')
| -rw-r--r-- | src/dev/x86/SouthBridge.py | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py index 45c49ce3a..911853dd5 100644 --- a/src/dev/x86/SouthBridge.py +++ b/src/dev/x86/SouthBridge.py @@ -84,6 +84,7 @@ class SouthBridge(SimObject): ide.ProgIF = 0x80 ide.InterruptLine = 14 ide.InterruptPin = 1 + ide.LegacyIOBase = x86IOAddress(0) def attachIO(self, bus, dma_ports): # Route interupt signals |