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-rw-r--r--src/dev/x86/SouthBridge.py1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py
index 7ac208d5e..45c49ce3a 100644
--- a/src/dev/x86/SouthBridge.py
+++ b/src/dev/x86/SouthBridge.py
@@ -45,6 +45,7 @@ def x86IOAddress(port):
class SouthBridge(SimObject):
type = 'SouthBridge'
+ cxx_header = "dev/x86/south_bridge.hh"
platform = Param.Platform(Parent.any, "Platform this device is part of")
_pic1 = I8259(pio_addr=x86IOAddress(0x20), mode='I8259Master')