diff options
Diffstat (limited to 'src/dev/x86')
| -rw-r--r-- | src/dev/x86/Pc.py | 4 | ||||
| -rw-r--r-- | src/dev/x86/SouthBridge.py | 5 |
2 files changed, 5 insertions, 4 deletions
diff --git a/src/dev/x86/Pc.py b/src/dev/x86/Pc.py index 5b7d0864e..91292788c 100644 --- a/src/dev/x86/Pc.py +++ b/src/dev/x86/Pc.py @@ -69,8 +69,8 @@ class Pc(Platform): # A device to catch accesses to the non-existant floppy controller. fake_floppy = IsaFake(pio_addr=x86IOAddress(0x3f2), pio_size=2) - def attachIO(self, bus): - self.south_bridge.attachIO(bus) + def attachIO(self, bus, dma_ports = []): + self.south_bridge.attachIO(bus, dma_ports) self.i_dont_exist.pio = bus.master self.behind_pci.pio = bus.master self.com_1.pio = bus.master diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py index 9f7070e96..87f4c3798 100644 --- a/src/dev/x86/SouthBridge.py +++ b/src/dev/x86/SouthBridge.py @@ -85,7 +85,7 @@ class SouthBridge(SimObject): ide.InterruptLine = 14 ide.InterruptPin = 1 - def attachIO(self, bus): + def attachIO(self, bus, dma_ports): # Route interupt signals self.int_lines = \ [X86IntLine(source=self.pic1.output, sink=self.io_apic.pin(0)), @@ -106,7 +106,8 @@ class SouthBridge(SimObject): self.dma1.pio = bus.master self.ide.pio = bus.master self.ide.config = bus.master - self.ide.dma = bus.slave + if dma_ports.count(self.ide.dma) == 0: + self.ide.dma = bus.slave self.keyboard.pio = bus.master self.pic1.pio = bus.master self.pic2.pio = bus.master |