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-rw-r--r--src/dev/x86/SouthBridge.py3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py
index d89ed9dc6..2d1827998 100644
--- a/src/dev/x86/SouthBridge.py
+++ b/src/dev/x86/SouthBridge.py
@@ -86,7 +86,8 @@ class SouthBridge(SimObject):
ide.BAR3Size = '3B'
ide.BAR3LegacyIO = True
ide.BAR4 = 1
- ide.Command = 1
+ ide.Command = 0
+ ide.ProgIF = 0x80
ide.InterruptLine = 14
ide.InterruptPin = 1